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and_gate.vvp
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#! /c/Source/iverilog-install/bin/vvp
:ivl_version "12.0 (devel)" "(s20150603-1539-g2693dd32b)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision - 12;
:vpi_module "D:\iverilog\lib\ivl\system.vpi";
:vpi_module "D:\iverilog\lib\ivl\vhdl_sys.vpi";
:vpi_module "D:\iverilog\lib\ivl\vhdl_textio.vpi";
:vpi_module "D:\iverilog\lib\ivl\v2005_math.vpi";
:vpi_module "D:\iverilog\lib\ivl\va_math.vpi";
S_00000214f9c581c0 .scope module, "and_tb" "and_tb" 2 3;
.timescale -9 -12;
v00000214f9c72dc0_0 .var "a", 0 0;
v00000214f9c72e60_0 .var "b", 0 0;
v00000214f9c72f00_0 .net "y", 0 0, L_00000214f9ca5c40; 1 drivers
S_00000214f9c58350 .scope module, "my_and" "and_gate" 2 8, 3 1 0, S_00000214f9c581c0;
.timescale -9 -12;
.port_info 0 /INPUT 1 "a";
.port_info 1 /INPUT 1 "b";
.port_info 2 /OUTPUT 1 "y";
L_00000214f9ca5c40 .functor AND 1, v00000214f9c72dc0_0, v00000214f9c72e60_0, C4<1>, C4<1>;
v00000214f9c735c0_0 .net "a", 0 0, v00000214f9c72dc0_0; 1 drivers
v00000214f9c584e0_0 .net "b", 0 0, v00000214f9c72e60_0; 1 drivers
v00000214f9c72d20_0 .net "y", 0 0, L_00000214f9ca5c40; alias, 1 drivers
.scope S_00000214f9c581c0;
T_0 ;
%vpi_call 2 16 "$monitor", "At time %t: a = %b, b = %b, y = %b", $time, v00000214f9c72dc0_0, v00000214f9c72e60_0, v00000214f9c72f00_0 {0 0 0};
%pushi/vec4 0, 0, 1;
%store/vec4 v00000214f9c72dc0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v00000214f9c72e60_0, 0, 1;
%delay 10000, 0;
%pushi/vec4 0, 0, 1;
%store/vec4 v00000214f9c72dc0_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v00000214f9c72e60_0, 0, 1;
%delay 10000, 0;
%pushi/vec4 1, 0, 1;
%store/vec4 v00000214f9c72dc0_0, 0, 1;
%pushi/vec4 0, 0, 1;
%store/vec4 v00000214f9c72e60_0, 0, 1;
%delay 10000, 0;
%pushi/vec4 1, 0, 1;
%store/vec4 v00000214f9c72dc0_0, 0, 1;
%pushi/vec4 1, 0, 1;
%store/vec4 v00000214f9c72e60_0, 0, 1;
%delay 10000, 0;
%vpi_call 2 22 "$finish" {0 0 0};
%end;
.thread T_0;
# The file index is used to find the file name in the following table.
:file_names 4;
"N/A";
"<interactive>";
"and_tb.v";
"./and_gate.v";