From a3fe8c2c8d82a564ebee87fc174f26e6df5f359f Mon Sep 17 00:00:00 2001 From: Stanislav Shwartsman Date: Fri, 17 Nov 2023 23:40:28 +0200 Subject: [PATCH] introduce get_efer_allow_mask function to avoid placing that code directly in init.cc --- bochs/cpu/cpu.h | 1 + bochs/cpu/crregs.cc | 27 +++++++++++++++++++++++++++ bochs/cpu/init.cc | 21 +++------------------ 3 files changed, 31 insertions(+), 18 deletions(-) diff --git a/bochs/cpu/cpu.h b/bochs/cpu/cpu.h index 2b81b47113..0db6337cbb 100644 --- a/bochs/cpu/cpu.h +++ b/bochs/cpu/cpu.h @@ -4388,6 +4388,7 @@ class BOCHSAPI BX_CPU_C : public logfunctions { #endif #if BX_CPU_LEVEL >= 5 BX_SMF bool SetEFER(bx_address val) BX_CPP_AttrRegparmN(1); + BX_SMF Bit32u get_efer_allow_mask(void); #endif BX_SMF bx_address read_CR0(void); diff --git a/bochs/cpu/crregs.cc b/bochs/cpu/crregs.cc index 08bac49daa..2436a5b1d7 100644 --- a/bochs/cpu/crregs.cc +++ b/bochs/cpu/crregs.cc @@ -1774,6 +1774,33 @@ void BX_CPU_C::xsave_xrestor_init(void) #endif } +#if BX_CPU_LEVEL >= 5 + +Bit32u BX_CPU_C::get_efer_allow_mask(void) +{ + Bit32u efer_allowed_mask = 0; + + if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_NX)) + efer_allowed_mask |= BX_EFER_NXE_MASK; + if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_SYSCALL_SYSRET_LEGACY)) + efer_allowed_mask |= BX_EFER_SCE_MASK; +#if BX_SUPPORT_X86_64 + if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_LONG_MODE)) { + efer_allowed_mask |= (BX_EFER_SCE_MASK | BX_EFER_LME_MASK | BX_EFER_LMA_MASK); + if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_FFXSR)) + efer_allowed_mask |= BX_EFER_FFXSR_MASK; + if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_SVM)) + efer_allowed_mask |= BX_EFER_SVME_MASK; + if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_TCE)) + efer_allowed_mask |= BX_EFER_TCE_MASK; + } +#endif + + return efer_allowed_mask; +} + +#endif + Bit32u BX_CPU_C::get_xcr0_allow_mask(void) { Bit32u allowMask = 0x3; diff --git a/bochs/cpu/init.cc b/bochs/cpu/init.cc index 2974705dfa..8637cc15ed 100644 --- a/bochs/cpu/init.cc +++ b/bochs/cpu/init.cc @@ -651,8 +651,6 @@ void BX_CPU_C::param_restore(bx_param_c *param, Bit64s val) void BX_CPU_C::after_restore_state(void) { - handleCpuContextChange(); - BX_CPU_THIS_PTR prev_rip = RIP; if (BX_CPU_THIS_PTR cpu_mode == BX_MODE_IA32_REAL) CPL = 0; @@ -672,6 +670,8 @@ void BX_CPU_C::after_restore_state(void) set_PKeys(BX_CPU_THIS_PTR pkru, BX_CPU_THIS_PTR pkrs); #endif + handleCpuContextChange(); + assert_checks(); debug(RIP); } @@ -912,22 +912,7 @@ void BX_CPU_C::reset(unsigned source) #endif BX_CPU_THIS_PTR efer.set32(0); - BX_CPU_THIS_PTR efer_suppmask = 0; - if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_NX)) - BX_CPU_THIS_PTR efer_suppmask |= BX_EFER_NXE_MASK; - if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_SYSCALL_SYSRET_LEGACY)) - BX_CPU_THIS_PTR efer_suppmask |= BX_EFER_SCE_MASK; -#if BX_SUPPORT_X86_64 - if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_LONG_MODE)) { - BX_CPU_THIS_PTR efer_suppmask |= (BX_EFER_SCE_MASK | BX_EFER_LME_MASK | BX_EFER_LMA_MASK); - if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_FFXSR)) - BX_CPU_THIS_PTR efer_suppmask |= BX_EFER_FFXSR_MASK; - if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_SVM)) - BX_CPU_THIS_PTR efer_suppmask |= BX_EFER_SVME_MASK; - if (BX_CPUID_SUPPORT_ISA_EXTENSION(BX_ISA_TCE)) - BX_CPU_THIS_PTR efer_suppmask |= BX_EFER_TCE_MASK; - } -#endif + BX_CPU_THIS_PTR efer_suppmask = get_efer_allow_mask(); BX_CPU_THIS_PTR msr.star = 0; #if BX_SUPPORT_X86_64