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linux-v6.11.patch
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From de3db4fc24bf051eacc287de15748cb24f65ea29 Mon Sep 17 00:00:00 2001
From: Dongli Zhang <[email protected]>
Date: Sun, 17 Nov 2024 22:07:43 -0800
Subject: [PATCH 1/1] linux-v6.11
Signed-off-by: Dongli Zhang <[email protected]>
---
arch/arm64/include/asm/arm_pmuv3.h | 4 +
arch/arm64/include/asm/cputype.h | 5 +
arch/arm64/include/asm/kvm_host.h | 101 +++
arch/arm64/kernel/acpi.c | 6 +
arch/arm64/kvm/arm.c | 72 ++
arch/arm64/kvm/guest.c | 4 +
arch/arm64/kvm/pmu-emul.c | 973 +++++++++++++++++++++++++
arch/arm64/kvm/sys_regs.c | 63 ++
arch/arm64/kvm/vgic/vgic.c | 13 +
arch/x86/events/amd/core.c | 5 +
arch/x86/events/core.c | 9 +
arch/x86/events/intel/core.c | 4 +
arch/x86/events/perf_event.h | 10 +
arch/x86/include/asm/kvm_host.h | 155 ++++
arch/x86/include/uapi/asm/kvm.h | 18 +
arch/x86/include/uapi/asm/kvm_para.h | 4 +
arch/x86/kernel/apic/vector.c | 19 +
arch/x86/kernel/kvm.c | 15 +
arch/x86/kernel/nmi.c | 7 +
arch/x86/kvm/cpuid.c | 13 +
arch/x86/kvm/pmu.c | 288 ++++++++
arch/x86/kvm/pmu.h | 60 ++
arch/x86/kvm/vmx/pmu_intel.c | 4 +
arch/x86/kvm/x86.c | 106 +++
drivers/block/xen-blkfront.c | 9 +
drivers/iommu/iommufd/pages.c | 6 +
drivers/pci/bus.c | 46 ++
drivers/pci/setup-bus.c | 4 +
drivers/pci/setup-res.c | 30 +
drivers/perf/arm_pmu.c | 55 ++
drivers/perf/arm_pmu_acpi.c | 4 +
drivers/perf/arm_pmuv3.c | 193 ++++-
drivers/target/loopback/tcm_loop.c | 27 +
drivers/target/target_core_configfs.c | 17 +
drivers/target/target_core_iblock.c | 6 +
drivers/target/target_core_tpg.c | 18 +
drivers/target/target_core_transport.c | 140 ++++
drivers/vfio/vfio_iommu_type1.c | 40 +
drivers/vhost/scsi.c | 731 +++++++++++++++++++
drivers/vhost/vhost.c | 81 ++
fs/locks.c | 117 +++
fs/nfs/nfs4proc.c | 7 +
fs/nfsd/nfs4state.c | 46 ++
include/kvm/arm_pmu.h | 51 ++
include/linux/filelock.h | 26 +
include/linux/perf_event.h | 41 ++
kernel/events/core.c | 82 +++
kernel/irq/manage.c | 3 +
kernel/irq/matrix.c | 191 +++++
kernel/irq/msi.c | 3 +
kernel/resource.c | 46 ++
kernel/vhost_task.c | 4 +
mm/util.c | 28 +
53 files changed, 4009 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/arm_pmuv3.h b/arch/arm64/include/asm/arm_pmuv3.h
index a4697a0b6..41daa4e6f 100644
--- a/arch/arm64/include/asm/arm_pmuv3.h
+++ b/arch/arm64/include/asm/arm_pmuv3.h
@@ -91,6 +91,10 @@ static inline void write_pmintenclr(u32 val)
write_sysreg(val, pmintenclr_el1);
}
+/*
+ * called by:
+ * - drivers/perf/arm_pmuv3.c|662| <<armv8pmu_write_event_type>> write_pmccfiltr(hwc->config_base);
+ */
static inline void write_pmccfiltr(u64 val)
{
write_sysreg(val, pmccfiltr_el0);
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 5fd7caea4..7d9227655 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -15,6 +15,11 @@
#define MPIDR_LEVEL_BITS (1 << MPIDR_LEVEL_BITS_SHIFT)
#define MPIDR_LEVEL_MASK ((1 << MPIDR_LEVEL_BITS) - 1)
+/*
+ * MPIDR_LEVEL_SHIFT(0) = (((1 << 0) >> 1) << 3) = 0
+ * MPIDR_LEVEL_SHIFT(1) = (((1 << 1) >> 1) << 3) = 8
+ * MPIDR_LEVEL_SHIFT(2) = (((1 << 2) >> 1) << 3) = 16 (0x10)
+ */
#define MPIDR_LEVEL_SHIFT(level) \
(((1 << level) >> 1) << MPIDR_LEVEL_BITS_SHIFT)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index a33f5996c..e50f11ff6 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -44,10 +44,26 @@
#define KVM_REQ_SLEEP \
KVM_ARCH_REQ_FLAGS(0, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
+/*
+ * 在以下使用KVM_REQ_IRQ_PENDING:
+ * - arch/arm64/kvm/arm.c|1009| <<check_vcpu_requests>> kvm_check_request(KVM_REQ_IRQ_PENDING, vcpu);
+ * - arch/arm64/kvm/arm.c|1348| <<vcpu_interrupt_line>> kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
+ * - arch/arm64/kvm/pmu-emul.c|865| <<kvm_pmu_perf_overflow>> kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
+ * - arch/arm64/kvm/vgic/vgic-v4.c|102| <<vgic_v4_doorbell_handler>> kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
+ * - arch/arm64/kvm/vgic/vgic.c|351| <<vgic_queue_irq_unlock>> kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
+ * - arch/arm64/kvm/vgic/vgic.c|401| <<vgic_queue_irq_unlock>> kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
+ * - arch/arm64/kvm/vgic/vgic.c|717| <<vgic_prune_ap_list>> kvm_make_request(KVM_REQ_IRQ_PENDING, target_vcpu);
+ * - arch/arm64/kvm/vgic/vgic.c|998| <<vgic_kick_vcpus>> kvm_make_request(KVM_REQ_IRQ_PENDING, vcpu);
+ */
#define KVM_REQ_IRQ_PENDING KVM_ARCH_REQ(1)
#define KVM_REQ_VCPU_RESET KVM_ARCH_REQ(2)
#define KVM_REQ_RECORD_STEAL KVM_ARCH_REQ(3)
#define KVM_REQ_RELOAD_GICv4 KVM_ARCH_REQ(4)
+/*
+ * 在以下使用KVM_REQ_RELOAD_PMU:
+ * - arch/arm64/kvm/arm.c|1022| <<check_vcpu_requests>> if (kvm_check_request(KVM_REQ_RELOAD_PMU, vcpu)) kvm_vcpu_reload_pmu(vcpu);
+ * - arch/arm64/kvm/pmu-emul.c|1413| <<kvm_arm_pmu_v3_enable>> kvm_make_request(KVM_REQ_RELOAD_PMU, vcpu);
+ */
#define KVM_REQ_RELOAD_PMU KVM_ARCH_REQ(5)
#define KVM_REQ_SUSPEND KVM_ARCH_REQ(6)
#define KVM_REQ_RESYNC_PMU_EL0 KVM_ARCH_REQ(7)
@@ -328,6 +344,23 @@ struct kvm_arch {
#define KVM_ARCH_FLAG_FGU_INITIALIZED 8
unsigned long flags;
+ /*
+ * #define KVM_ARM_VCPU_POWER_OFF 0 // CPU is started in OFF state
+ * #define KVM_ARM_VCPU_EL1_32BIT 1 // CPU running a 32bit VM
+ * #define KVM_ARM_VCPU_PSCI_0_2 2 // CPU uses PSCI v0.2
+ * #define KVM_ARM_VCPU_PMU_V3 3 // Support guest PMUv3
+ * #define KVM_ARM_VCPU_SVE 4 // enable SVE for this CPU
+ * #define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 // VCPU uses address authentication
+ * #define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 // VCPU uses generic authentication
+ * #define KVM_ARM_VCPU_HAS_EL2 7 // Support nested virtualization
+ *
+ * 在以下使用kvm_arch->vcpu_features:
+ * - arch/arm64/include/asm/kvm_host.h|348| <<global>> DECLARE_BITMAP(vcpu_features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/include/asm/kvm_host.h|1427| <<__vcpu_has_feature>> return test_bit(feature, ka->vcpu_features);
+ * - arch/arm64/kvm/arm.c|212| <<kvm_arch_init_vm>> bitmap_zero(kvm->arch.vcpu_features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/kvm/arm.c|1480| <<kvm_vcpu_init_changed>> return !bitmap_equal(vcpu->kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/kvm/arm.c|1516| <<__kvm_vcpu_set_target>> bitmap_copy(kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES);
+ */
/* VM-wide vCPU feature set */
DECLARE_BITMAP(vcpu_features, KVM_VCPU_MAX_FEATURES);
@@ -338,11 +371,42 @@ struct kvm_arch {
* VM-wide PMU filter, implemented as a bitmap and big enough for
* up to 2^10 events (ARMv8.0) or 2^16 events (ARMv8.1+).
*/
+ /*
+ * 在以下使用kvm_arch->pmu_filter:
+ * - arch/arm64/kvm/arm.c|256| <<kvm_arch_destroy_vm>> bitmap_free(kvm->arch.pmu_filter);
+ * - arch/arm64/kvm/pmu-emul.c|1094| <<kvm_pmu_create_perf_event>> if (vcpu->kvm->arch.pmu_filter && !test_bit(eventsel, vcpu->kvm->arch.pmu_filter))
+ * - arch/arm64/kvm/pmu-emul.c|1095| <<kvm_pmu_create_perf_event>> !test_bit(eventsel, vcpu->kvm->arch.pmu_filter))
+ * - arch/arm64/kvm/pmu-emul.c|1234| <<kvm_pmu_get_pmceid>> unsigned long *bmap = vcpu->kvm->arch.pmu_filter;
+ * - arch/arm64/kvm/pmu-emul.c|1443| <<kvm_arm_pmu_v3_set_pmu>> (kvm->arch.pmu_filter && kvm->arch.arm_pmu != arm_pmu)) {
+ * - arch/arm64/kvm/pmu-emul.c|1522| <<kvm_arm_pmu_v3_set_attr>> if (!kvm->arch.pmu_filter) {
+ * - arch/arm64/kvm/pmu-emul.c|1523| <<kvm_arm_pmu_v3_set_attr>> kvm->arch.pmu_filter = bitmap_alloc(nr_events, GFP_KERNEL_ACCOUNT);
+ * - arch/arm64/kvm/pmu-emul.c|1524| <<kvm_arm_pmu_v3_set_attr>> if (!kvm->arch.pmu_filter)
+ * - arch/arm64/kvm/pmu-emul.c|1534| <<kvm_arm_pmu_v3_set_attr>> bitmap_zero(kvm->arch.pmu_filter, nr_events);
+ * - arch/arm64/kvm/pmu-emul.c|1536| <<kvm_arm_pmu_v3_set_attr>> bitmap_fill(kvm->arch.pmu_filter, nr_events);
+ * - arch/arm64/kvm/pmu-emul.c|1540| <<kvm_arm_pmu_v3_set_attr>> bitmap_set(kvm->arch.pmu_filter, filter.base_event, filter.nevents);
+ * - arch/arm64/kvm/pmu-emul.c|1542| <<kvm_arm_pmu_v3_set_attr>> bitmap_clear(kvm->arch.pmu_filter, filter.base_event, filter.nevents);
+ */
unsigned long *pmu_filter;
struct arm_pmu *arm_pmu;
cpumask_var_t supported_cpus;
+ /*
+ * 在以下使用kvm_arch->pmcr_n:
+ * - arch/arm64/kvm/pmu-emul.c|1682| <<kvm_arm_set_pmu>> kvm->arch.pmcr_n = kvm_arm_pmu_get_max_counters(kvm);
+ * - arch/arm64/kvm/pmu-emul.c|1969| <<kvm_vcpu_read_pmcr>> return u64_replace_bits(pmcr, vcpu->kvm->arch.pmcr_n, ARMV8_PMU_PMCR_N);
+ * - arch/arm64/kvm/sys_regs.c|862| <<reset_pmu_reg>> u8 n = vcpu->kvm->arch.pmcr_n;
+ * - arch/arm64/kvm/sys_regs.c|1321| <<set_pmcr>> kvm->arch.pmcr_n = new_n;
+ *
+ * PMCR寄存器:
+ * PMCR_EL0, Performance Monitors Control Register
+ *
+ * Provides details of the Performance Monitors implementation, including the
+ * number of counters implemented, and configures and controls the counters.
+ *
+ * 比方N是[15:11]: Indicates the number of event counters implemented. Reads of
+ * this field from EL1 and EL0 return the value of AArch64-MDCR_EL2.HPMN.
+ */
/* PMCR_EL0.N value for the guest */
u8 pmcr_n;
@@ -1364,6 +1428,22 @@ bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu);
#define kvm_arm_vcpu_sve_finalized(vcpu) vcpu_get_flag(vcpu, VCPU_SVE_FINALIZED)
+/*
+ * called by:
+ * - arch/arm64/kvm/arm.c|1482| <<kvm_vcpu_init_check_features>> if (kvm_has_mte(vcpu->kvm))
+ * - arch/arm64/kvm/guest.c|1032| <<kvm_vm_ioctl_mte_copy_tags>> if (!kvm_has_mte(kvm))
+ * - arch/arm64/kvm/hyp/exception.c|134| <<enter_exception64>> if (kvm_has_mte(kern_hyp_va(vcpu->kvm)))
+ * - arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h|44| <<ctxt_has_mte>> return kvm_has_mte(kern_hyp_va(vcpu->kvm));
+ * - arch/arm64/kvm/hyp/nvhe/sys_regs.c|102| <<get_pvm_id_aa64pfr1>> if (!kvm_has_mte(kvm))
+ * - arch/arm64/kvm/mmu.c|1405| <<sanitise_mte_tags>> if (!kvm_has_mte(kvm))
+ * - arch/arm64/kvm/mmu.c|1648| <<user_mem_abort>> if (!fault_is_perm && !device && kvm_has_mte(kvm)) {
+ * - arch/arm64/kvm/mmu.c|2148| <<kvm_arch_prepare_memory_region>> if (kvm_has_mte(kvm) && !kvm_vma_mte_allowed(vma)) {
+ * - arch/arm64/kvm/sys_regs.c|349| <<access_dcgsw>> if (!kvm_has_mte(vcpu->kvm)) {
+ * - arch/arm64/kvm/sys_regs.c|1601| <<__kvm_read_sanitised_id_reg>> if (!kvm_has_mte(vcpu->kvm))
+ * - arch/arm64/kvm/sys_regs.c|2037| <<reset_clidr>> if (kvm_has_mte(vcpu->kvm))
+ * - arch/arm64/kvm/sys_regs.c|2090| <<mte_visibility>> if (kvm_has_mte(vcpu->kvm))
+ * - arch/arm64/kvm/sys_regs.c|4599| <<vcpu_set_hcr>> if (kvm_has_mte(vcpu->kvm))
+ */
#define kvm_has_mte(kvm) \
(system_supports_mte() && \
test_bit(KVM_ARCH_FLAG_MTE_ENABLED, &(kvm)->arch.flags))
@@ -1375,8 +1455,29 @@ bool kvm_arm_vcpu_is_finalized(struct kvm_vcpu *vcpu);
#define kvm_vm_has_ran_once(kvm) \
(test_bit(KVM_ARCH_FLAG_HAS_RAN_ONCE, &(kvm)->arch.flags))
+/*
+ * #define KVM_ARM_VCPU_POWER_OFF 0 // CPU is started in OFF state
+ * #define KVM_ARM_VCPU_EL1_32BIT 1 // CPU running a 32bit VM
+ * #define KVM_ARM_VCPU_PSCI_0_2 2 // CPU uses PSCI v0.2
+ * #define KVM_ARM_VCPU_PMU_V3 3 // Support guest PMUv3
+ * #define KVM_ARM_VCPU_SVE 4 // enable SVE for this CPU
+ * #define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 // VCPU uses address authentication
+ * #define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 // VCPU uses generic authentication
+ * #define KVM_ARM_VCPU_HAS_EL2 7 // Support nested virtualization
+ */
static inline bool __vcpu_has_feature(const struct kvm_arch *ka, int feature)
{
+ /*
+ * 在以下使用kvm_arch->vcpu_features:
+ * - arch/arm64/include/asm/kvm_host.h|348| <<global>> DECLARE_BITMAP(vcpu_features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/include/asm/kvm_host.h|1427| <<__vcpu_has_feature>> return test_bit(feature, ka->vcpu_features);
+ * - arch/arm64/kvm/arm.c|212| <<kvm_arch_init_vm>> bitmap_zero(kvm->arch.vcpu_features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/kvm/arm.c|1480| <<kvm_vcpu_init_changed>> return !bitmap_equal(vcpu->kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/kvm/arm.c|1516| <<__kvm_vcpu_set_target>> bitmap_copy(kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES);
+ *
+ * struct kvm_arch:
+ * -> DECLARE_BITMAP(vcpu_features, KVM_VCPU_MAX_FEATURES)
+ */
return test_bit(feature, ka->vcpu_features);
}
diff --git a/arch/arm64/kernel/acpi.c b/arch/arm64/kernel/acpi.c
index e6f66491f..25e992738 100644
--- a/arch/arm64/kernel/acpi.c
+++ b/arch/arm64/kernel/acpi.c
@@ -37,6 +37,12 @@
#include <asm/smp_plat.h>
int acpi_noirq = 1; /* skip ACPI IRQ initialization */
+/*
+ * 在以下设置arm64的acpi_disabled:
+ * - arch/arm64/kernel/acpi.c|40| <<global>> int acpi_disabled = 1;
+ * - arch/arm64/include/asm/acpi.h|85| <<disable_acpi>> acpi_disabled = 1;
+ * - arch/arm64/include/asm/acpi.h|92| <<enable_acpi>> acpi_disabled = 0;
+ */
int acpi_disabled = 1;
EXPORT_SYMBOL(acpi_disabled);
diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
index 9bef76383..3b11c0290 100644
--- a/arch/arm64/kvm/arm.c
+++ b/arch/arm64/kvm/arm.c
@@ -209,6 +209,23 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
kvm_arm_init_hypercalls(kvm);
+ /*
+ * #define KVM_ARM_VCPU_POWER_OFF 0 // CPU is started in OFF state
+ * #define KVM_ARM_VCPU_EL1_32BIT 1 // CPU running a 32bit VM
+ * #define KVM_ARM_VCPU_PSCI_0_2 2 // CPU uses PSCI v0.2
+ * #define KVM_ARM_VCPU_PMU_V3 3 // Support guest PMUv3
+ * #define KVM_ARM_VCPU_SVE 4 // enable SVE for this CPU
+ * #define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 // VCPU uses address authentication
+ * #define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 // VCPU uses generic authentication
+ * #define KVM_ARM_VCPU_HAS_EL2 7 // Support nested virtualization
+ *
+ * 在以下使用kvm_arch->vcpu_features:
+ * - arch/arm64/include/asm/kvm_host.h|348| <<global>> DECLARE_BITMAP(vcpu_features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/include/asm/kvm_host.h|1427| <<__vcpu_has_feature>> return test_bit(feature, ka->vcpu_features);
+ * - arch/arm64/kvm/arm.c|212| <<kvm_arch_init_vm>> bitmap_zero(kvm->arch.vcpu_features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/kvm/arm.c|1480| <<kvm_vcpu_init_changed>> return !bitmap_equal(vcpu->kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/kvm/arm.c|1516| <<__kvm_vcpu_set_target>> bitmap_copy(kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES);
+ */
bitmap_zero(kvm->arch.vcpu_features, KVM_VCPU_MAX_FEATURES);
return 0;
@@ -1019,6 +1036,11 @@ static int check_vcpu_requests(struct kvm_vcpu *vcpu)
preempt_enable();
}
+ /*
+ * 在以下使用KVM_REQ_RELOAD_PMU:
+ * - arch/arm64/kvm/arm.c|1022| <<check_vcpu_requests>> if (kvm_check_request(KVM_REQ_RELOAD_PMU, vcpu)) kvm_vcpu_reload_pmu(vcpu);
+ * - arch/arm64/kvm/pmu-emul.c|1413| <<kvm_arm_pmu_v3_enable>> kvm_make_request(KVM_REQ_RELOAD_PMU, vcpu);
+ */
if (kvm_check_request(KVM_REQ_RELOAD_PMU, vcpu))
kvm_vcpu_reload_pmu(vcpu);
@@ -1472,6 +1494,23 @@ static bool kvm_vcpu_init_changed(struct kvm_vcpu *vcpu,
{
unsigned long features = init->features[0];
+ /*
+ * #define KVM_ARM_VCPU_POWER_OFF 0 // CPU is started in OFF state
+ * #define KVM_ARM_VCPU_EL1_32BIT 1 // CPU running a 32bit VM
+ * #define KVM_ARM_VCPU_PSCI_0_2 2 // CPU uses PSCI v0.2
+ * #define KVM_ARM_VCPU_PMU_V3 3 // Support guest PMUv3
+ * #define KVM_ARM_VCPU_SVE 4 // enable SVE for this CPU
+ * #define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 // VCPU uses address authentication
+ * #define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 // VCPU uses generic authentication
+ * #define KVM_ARM_VCPU_HAS_EL2 7 // Support nested virtualization
+ *
+ * 在以下使用kvm_arch->vcpu_features:
+ * - arch/arm64/include/asm/kvm_host.h|348| <<global>> DECLARE_BITMAP(vcpu_features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/include/asm/kvm_host.h|1427| <<__vcpu_has_feature>> return test_bit(feature, ka->vcpu_features);
+ * - arch/arm64/kvm/arm.c|212| <<kvm_arch_init_vm>> bitmap_zero(kvm->arch.vcpu_features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/kvm/arm.c|1480| <<kvm_vcpu_init_changed>> return !bitmap_equal(vcpu->kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/kvm/arm.c|1516| <<__kvm_vcpu_set_target>> bitmap_copy(kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES);
+ */
return !bitmap_equal(vcpu->kvm->arch.vcpu_features, &features,
KVM_VCPU_MAX_FEATURES);
}
@@ -1495,6 +1534,10 @@ static int kvm_setup_vcpu(struct kvm_vcpu *vcpu)
return ret;
}
+/*
+ * called by:
+ * - arch/arm64/kvm/arm.c|1547| <<kvm_vcpu_set_target>> return __kvm_vcpu_set_target(vcpu, init);
+ */
static int __kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
const struct kvm_vcpu_init *init)
{
@@ -1508,6 +1551,23 @@ static int __kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
kvm_vcpu_init_changed(vcpu, init))
goto out_unlock;
+ /*
+ * #define KVM_ARM_VCPU_POWER_OFF 0 // CPU is started in OFF state
+ * #define KVM_ARM_VCPU_EL1_32BIT 1 // CPU running a 32bit VM
+ * #define KVM_ARM_VCPU_PSCI_0_2 2 // CPU uses PSCI v0.2
+ * #define KVM_ARM_VCPU_PMU_V3 3 // Support guest PMUv3
+ * #define KVM_ARM_VCPU_SVE 4 // enable SVE for this CPU
+ * #define KVM_ARM_VCPU_PTRAUTH_ADDRESS 5 // VCPU uses address authentication
+ * #define KVM_ARM_VCPU_PTRAUTH_GENERIC 6 // VCPU uses generic authentication
+ * #define KVM_ARM_VCPU_HAS_EL2 7 // Support nested virtualization
+ *
+ * 在以下使用kvm_arch->vcpu_features:
+ * - arch/arm64/include/asm/kvm_host.h|348| <<global>> DECLARE_BITMAP(vcpu_features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/include/asm/kvm_host.h|1427| <<__vcpu_has_feature>> return test_bit(feature, ka->vcpu_features);
+ * - arch/arm64/kvm/arm.c|212| <<kvm_arch_init_vm>> bitmap_zero(kvm->arch.vcpu_features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/kvm/arm.c|1480| <<kvm_vcpu_init_changed>> return !bitmap_equal(vcpu->kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES);
+ * - arch/arm64/kvm/arm.c|1516| <<__kvm_vcpu_set_target>> bitmap_copy(kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES);
+ */
bitmap_copy(kvm->arch.vcpu_features, &features, KVM_VCPU_MAX_FEATURES);
ret = kvm_setup_vcpu(vcpu);
@@ -1525,6 +1585,10 @@ static int __kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
return ret;
}
+/*
+ * 处理KVM_ARM_VCPU_INIT:
+ * - arch/arm64/kvm/arm.c|1572| <<kvm_arch_vcpu_ioctl_vcpu_init(KVM_ARM_VCPU_INIT)>> ret = kvm_vcpu_set_target(vcpu, init);
+ */
static int kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
const struct kvm_vcpu_init *init)
{
@@ -1602,6 +1666,10 @@ static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu,
return 0;
}
+/*
+ * 处理KVM_SET_DEVICE_ATTR:
+ * - arch/arm64/kvm/arm.c|1753| <<kvm_arch_vcpu_ioctl(KVM_SET_DEVICE_ATTR)>> r = kvm_arm_vcpu_set_attr(vcpu, &attr);
+ */
static int kvm_arm_vcpu_set_attr(struct kvm_vcpu *vcpu,
struct kvm_device_attr *attr)
{
@@ -1670,6 +1738,10 @@ static int kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
return __kvm_arm_vcpu_set_events(vcpu, events);
}
+/*
+ * called by:
+ * - virt/kvm/kvm_main.c|4654| <<kvm_vcpu_ioctl(default)>> r = kvm_arch_vcpu_ioctl(filp, ioctl, arg);
+ */
long kvm_arch_vcpu_ioctl(struct file *filp,
unsigned int ioctl, unsigned long arg)
{
diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c
index 11098eb7e..f04eb67b9 100644
--- a/arch/arm64/kvm/guest.c
+++ b/arch/arm64/kvm/guest.c
@@ -944,6 +944,10 @@ int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
return ret;
}
+/*
+ * called by:
+ * - arch/arm64/kvm/arm.c|1617| <<kvm_arm_vcpu_set_attr>> ret = kvm_arm_vcpu_arch_set_attr(vcpu, attr);
+ */
int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
struct kvm_device_attr *attr)
{
diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
index 82a2a0032..3bd71504f 100644
--- a/arch/arm64/kvm/pmu-emul.c
+++ b/arch/arm64/kvm/pmu-emul.c
@@ -15,26 +15,116 @@
#include <kvm/arm_pmu.h>
#include <kvm/arm_vgic.h>
+/*
+ * 1134 #define read_sysreg(r) ({ \
+ * 1135 u64 __val; \
+ * 1136 asm volatile("mrs %0, " __stringify(r) : "=r" (__val)); \
+ * 1137 __val; \
+ * 1138 })
+ * 1139
+ *
+ * 读用的是MRS:
+ * Move System Register to general-purpose register allows the PE to read an
+ * AArch64 System register into a general-purpose register.
+ *
+ *
+ * 1144 #define write_sysreg(v, r) do { \
+ * 1145 u64 __val = (u64)(v); \
+ * 1146 asm volatile("msr " __stringify(r) ", %x0" \
+ * 1147 : : "rZ" (__val)); \
+ * 1148 } while (0)
+ *
+ * 写用的是MSR:
+ * Move general-purpose register to System Register allows the PE to write an
+ * AArch64 System register from a general-purpose register.
+ */
+
#define PERF_ATTR_CFG1_COUNTER_64BIT BIT(0)
+/*
+ * 在以下使用kvm_arm_pmu_available:
+ * - arch/arm64/kernel/image-vars.h|114| <<global>> KVM_NVHE_ALIAS(kvm_arm_pmu_available);
+ * - arch/arm64/kvm/pmu-emul.c|20| <<global>> DEFINE_STATIC_KEY_FALSE(kvm_arm_pmu_available);
+ * - include/kvm/arm_pmu.h|40| <<global>> DECLARE_STATIC_KEY_FALSE(kvm_arm_pmu_available);
+ * - arch/arm64/kvm/pmu-emul.c|714| <<kvm_host_pmu_init>> static_branch_enable(&kvm_arm_pmu_available);
+ * - include/kvm/arm_pmu.h|44| <<kvm_arm_support_pmu_v3>> return static_branch_likely(&kvm_arm_pmu_available);
+ */
DEFINE_STATIC_KEY_FALSE(kvm_arm_pmu_available);
+/*
+ * 在以下使用LIST_HEAD(arm_pmus):
+ * - arch/arm64/kvm/pmu-emul.c|22| <<global>> static LIST_HEAD(arm_pmus);
+ * - arch/arm64/kvm/pmu-emul.c|711| <<kvm_host_pmu_init>> list_add_tail(&entry->entry, &arm_pmus);
+ * - arch/arm64/kvm/pmu-emul.c|713| <<kvm_host_pmu_init>> if (list_is_singular(&arm_pmus))
+ * - arch/arm64/kvm/pmu-emul.c|746| <<kvm_pmu_probe_armpmu>> list_for_each_entry(entry, &arm_pmus, entry) {
+ * - arch/arm64/kvm/pmu-emul.c|960| <<kvm_arm_pmu_v3_set_pmu>> list_for_each_entry(entry, &arm_pmus, entry) {
+ */
static LIST_HEAD(arm_pmus);
static DEFINE_MUTEX(arm_pmus_lock);
static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc);
static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc);
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|84| <<kvm_pmc_is_64bit>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|92| <<kvm_pmc_has_64bit_overflow>> u64 val = kvm_vcpu_read_pmcr(kvm_pmc_to_vcpu(pmc));
+ * - arch/arm64/kvm/pmu-emul.c|116| <<kvm_pmu_get_pmc_value>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|151| <<kvm_pmu_set_pmc_value>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|211| <<kvm_pmu_stop_counter>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|502| <<kvm_pmu_perf_overflow>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|587| <<kvm_pmu_counter_is_enabled>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|598| <<kvm_pmu_create_perf_event>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ */
static struct kvm_vcpu *kvm_pmc_to_vcpu(const struct kvm_pmc *pmc)
{
+ /*
+ * struct kvm_vcpu:
+ * -> struct kvm_vcpu_arch arch;
+ * -> struct kvm_pmu pmu;
+ * -> struct irq_work overflow_work;
+ * -> struct kvm_pmu_events events;
+ * -> struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS];
+ * -> int irq_num;
+ * -> bool created;
+ * -> bool irq_level;
+ */
return container_of(pmc, struct kvm_vcpu, arch.pmu.pmc[pmc->idx]);
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|146| <<kvm_pmu_get_counter_value>> return kvm_pmu_get_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, select_idx));
+ * - arch/arm64/kvm/pmu-emul.c|187| <<kvm_pmu_set_counter_value>> kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, select_idx), val, false);
+ * - arch/arm64/kvm/pmu-emul.c|251| <<kvm_pmu_vcpu_reset>> kvm_pmu_stop_counter(kvm_vcpu_idx_to_pmc(vcpu, i));
+ * - arch/arm64/kvm/pmu-emul.c|264| <<kvm_pmu_vcpu_destroy>> kvm_pmu_release_perf_event(kvm_vcpu_idx_to_pmc(vcpu, i));
+ * - arch/arm64/kvm/pmu-emul.c|300| <<kvm_pmu_enable_counter_mask>> pmc = kvm_vcpu_idx_to_pmc(vcpu, i);
+ * - arch/arm64/kvm/pmu-emul.c|332| <<kvm_pmu_disable_counter_mask>> pmc = kvm_vcpu_idx_to_pmc(vcpu, i);
+ * - arch/arm64/kvm/pmu-emul.c|452| <<kvm_pmu_counter_increment>> struct kvm_pmc *pmc = kvm_vcpu_idx_to_pmc(vcpu, i);
+ * - arch/arm64/kvm/pmu-emul.c|580| <<kvm_pmu_handle_pmcr>> kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, i), 0, true);
+ * - arch/arm64/kvm/pmu-emul.c|681| <<kvm_pmu_set_counter_event_type>> struct kvm_pmc *pmc = kvm_vcpu_idx_to_pmc(vcpu, select_idx);
+ */
static struct kvm_pmc *kvm_vcpu_idx_to_pmc(struct kvm_vcpu *vcpu, int cnt_idx)
{
+ /*
+ * struct kvm_vcpu:
+ * -> struct kvm_vcpu_arch arch;
+ * -> struct kvm_pmu pmu;
+ * -> struct irq_work overflow_work;
+ * -> struct kvm_pmu_events events;
+ * -> struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS];
+ * -> int irq_num;
+ * -> bool created;
+ * -> bool irq_level;
+ */
return &vcpu->arch.pmu.pmc[cnt_idx];
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|59| <<kvm_pmu_event_mask>> return __kvm_pmu_event_mask(pmuver);
+ * - arch/arm64/kvm/pmu-emul.c|1028| <<kvm_arm_pmu_v3_set_attr>> nr_events = __kvm_pmu_event_mask(pmuver) + 1;
+ */
static u32 __kvm_pmu_event_mask(unsigned int pmuver)
{
switch (pmuver) {
@@ -51,6 +141,13 @@ static u32 __kvm_pmu_event_mask(unsigned int pmuver)
}
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|65| <<kvm_pmu_evtyper_mask>> kvm_pmu_event_mask(kvm);
+ * - arch/arm64/kvm/pmu-emul.c|457| <<kvm_pmu_counter_increment>> type &= kvm_pmu_event_mask(vcpu->kvm);
+ * - arch/arm64/kvm/pmu-emul.c|612| <<kvm_pmu_create_perf_event>> eventsel = data & kvm_pmu_event_mask(vcpu->kvm);
+ * - arch/arm64/kvm/pmu-emul.c|789| <<kvm_pmu_get_pmceid>> nr_events = kvm_pmu_event_mask(vcpu->kvm) + 1;
+ */
static u32 kvm_pmu_event_mask(struct kvm *kvm)
{
u64 dfr0 = kvm_read_vm_id_reg(kvm, SYS_ID_AA64DFR0_EL1);
@@ -59,6 +156,11 @@ static u32 kvm_pmu_event_mask(struct kvm *kvm)
return __kvm_pmu_event_mask(pmuver);
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|688| <<kvm_pmu_set_counter_event_type>> __vcpu_sys_reg(vcpu, reg) = data & kvm_pmu_evtyper_mask(vcpu->kvm);
+ * - arch/arm64/kvm/sys_regs.c|888| <<reset_pmevtyper>> __vcpu_sys_reg(vcpu, r->reg) &= kvm_pmu_evtyper_mask(vcpu->kvm);
+ */
u64 kvm_pmu_evtyper_mask(struct kvm *kvm)
{
u64 mask = ARMV8_PMU_EXCLUDE_EL1 | ARMV8_PMU_EXCLUDE_EL0 |
@@ -79,38 +181,111 @@ u64 kvm_pmu_evtyper_mask(struct kvm *kvm)
* kvm_pmc_is_64bit - determine if counter is 64bit
* @pmc: counter context
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|130| <<kvm_pmu_get_pmc_value>> if (!kvm_pmc_is_64bit(pmc))
+ * - arch/arm64/kvm/pmu-emul.c|463| <<kvm_pmu_counter_increment>> if (!kvm_pmc_is_64bit(pmc))
+ * - arch/arm64/kvm/pmu-emul.c|485| <<compute_period>> if (kvm_pmc_is_64bit(pmc) && kvm_pmc_has_64bit_overflow(pmc))
+ * - arch/arm64/kvm/pmu-emul.c|651| <<kvm_pmu_create_perf_event>> if (kvm_pmc_is_64bit(pmc))
+ */
static bool kvm_pmc_is_64bit(struct kvm_pmc *pmc)
{
struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ /*
+ * 注释:
+ * If FEAT_PMUv3p5 is implemented and the highest Exception level is
+ * using AArch64, the event counters are 64-bit. If FEAT_PMUv3p5 is not
+ * implemented, the event counters are 32-bit.
+ */
return (pmc->idx == ARMV8_PMU_CYCLE_IDX ||
kvm_has_feat(vcpu->kvm, ID_AA64DFR0_EL1, PMUVer, V3P5));
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|101| <<kvm_pmu_counter_can_chain>> return (!(pmc->idx & 1) && (pmc->idx + 1) < ARMV8_PMU_CYCLE_IDX && !kvm_pmc_has_64bit_overflow(pmc));
+ * - arch/arm64/kvm/pmu-emul.c|468| <<kvm_pmu_counter_increment>> if (kvm_pmc_has_64bit_overflow(pmc) ? reg : lower_32_bits(reg))
+ * - arch/arm64/kvm/pmu-emul.c|485| <<compute_period>> if (kvm_pmc_is_64bit(pmc) && kvm_pmc_has_64bit_overflow(pmc))
+ */
static bool kvm_pmc_has_64bit_overflow(struct kvm_pmc *pmc)
{
u64 val = kvm_vcpu_read_pmcr(kvm_pmc_to_vcpu(pmc));
+ /*
+ * 207 //
+ * 208 // Per-CPU PMCR: config reg
+ * 209 //
+ * 210 #define ARMV8_PMU_PMCR_E (1 << 0) // Enable all counters
+ * 211 #define ARMV8_PMU_PMCR_P (1 << 1) // Reset all counters
+ * 212 #define ARMV8_PMU_PMCR_C (1 << 2) // Cycle counter reset
+ * 213 #define ARMV8_PMU_PMCR_D (1 << 3) // CCNT counts every 64th cpu cycle
+ * 214 #define ARMV8_PMU_PMCR_X (1 << 4) // Export to ETM
+ * 215 #define ARMV8_PMU_PMCR_DP (1 << 5) // Disable CCNT if non-invasive debug
+ * 216 #define ARMV8_PMU_PMCR_LC (1 << 6) // Overflow on 64 bit cycle counter
+ * 217 #define ARMV8_PMU_PMCR_LP (1 << 7) // Long event counter enable
+ * 218 #define ARMV8_PMU_PMCR_N GENMASK(15, 11) // Number of counters supported
+ */
return (pmc->idx < ARMV8_PMU_CYCLE_IDX && (val & ARMV8_PMU_PMCR_LP)) ||
(pmc->idx == ARMV8_PMU_CYCLE_IDX && (val & ARMV8_PMU_PMCR_LC));
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|474| <<kvm_pmu_counter_increment>> if (kvm_pmu_counter_can_chain(pmc))
+ * - arch/arm64/kvm/pmu-emul.c|520| <<kvm_pmu_perf_overflow>> if (kvm_pmu_counter_can_chain(pmc))
+ */
static bool kvm_pmu_counter_can_chain(struct kvm_pmc *pmc)
{
return (!(pmc->idx & 1) && (pmc->idx + 1) < ARMV8_PMU_CYCLE_IDX &&
!kvm_pmc_has_64bit_overflow(pmc));
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|119| <<kvm_pmu_get_pmc_value>> reg = counter_index_to_reg(pmc->idx);
+ * - arch/arm64/kvm/pmu-emul.c|156| <<kvm_pmu_set_pmc_value>> reg = counter_index_to_reg(pmc->idx);
+ * - arch/arm64/kvm/pmu-emul.c|219| <<kvm_pmu_stop_counter>> reg = counter_index_to_reg(pmc->idx);
+ * - arch/arm64/kvm/pmu-emul.c|462| <<kvm_pmu_counter_increment>> reg = __vcpu_sys_reg(vcpu, counter_index_to_reg(i)) + 1;
+ * - arch/arm64/kvm/pmu-emul.c|465| <<kvm_pmu_counter_increment>> __vcpu_sys_reg(vcpu, counter_index_to_reg(i)) = reg;
+ */
static u32 counter_index_to_reg(u64 idx)
{
+ /*
+ * 418 // Performance Monitors Registers
+ * 419 PMCR_EL0, // Control Register
+ * 420 PMSELR_EL0, // Event Counter Selection Register
+ * 421 PMEVCNTR0_EL0, // Event Counter Register (0-30)
+ * 422 PMEVCNTR30_EL0 = PMEVCNTR0_EL0 + 30,
+ * 423 PMCCNTR_EL0, // Cycle Counter Register
+ * 424 PMEVTYPER0_EL0, // Event Type Register (0-30)
+ * 425 PMEVTYPER30_EL0 = PMEVTYPER0_EL0 + 30,
+ * 426 PMCCFILTR_EL0, // Cycle Count Filter Register
+ * 427 PMCNTENSET_EL0, // Count Enable Set Register
+ * 428 PMINTENSET_EL1, // Interrupt Enable Set Register
+ * 429 PMOVSSET_EL0, // Overflow Flag Status Set Register
+ * 430 PMUSERENR_EL0, // User Enable Register
+ */
return (idx == ARMV8_PMU_CYCLE_IDX) ? PMCCNTR_EL0 : PMEVCNTR0_EL0 + idx;
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|456| <<kvm_pmu_counter_increment>> type = __vcpu_sys_reg(vcpu, counter_index_to_evtreg(i));
+ * - arch/arm64/kvm/pmu-emul.c|605| <<kvm_pmu_create_perf_event>> reg = counter_index_to_evtreg(pmc->idx);
+ * - arch/arm64/kvm/pmu-emul.c|687| <<kvm_pmu_set_counter_event_type>> reg = counter_index_to_evtreg(pmc->idx);
+ */
static u32 counter_index_to_evtreg(u64 idx)
{
return (idx == ARMV8_PMU_CYCLE_IDX) ? PMCCFILTR_EL0 : PMEVTYPER0_EL0 + idx;
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|146| <<kvm_pmu_get_counter_value>> return kvm_pmu_get_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, select_idx));
+ * - arch/arm64/kvm/pmu-emul.c|217| <<kvm_pmu_stop_counter>> val = kvm_pmu_get_pmc_value(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|654| <<kvm_pmu_create_perf_event>> attr.sample_period = compute_period(pmc, kvm_pmu_get_pmc_value(pmc));
+ */
static u64 kvm_pmu_get_pmc_value(struct kvm_pmc *pmc)
{
struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
@@ -123,10 +298,26 @@ static u64 kvm_pmu_get_pmc_value(struct kvm_pmc *pmc)
* The real counter value is equal to the value of counter register plus
* the value perf event counts.
*/
+ /*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|127| <<kvm_pmu_get_pmc_value>> counter += perf_event_read_value(pmc->perf_event, &enabled,
+ * - arch/riscv/kvm/vcpu_pmu.c|249| <<pmu_ctr_read>> pmc->counter_val += perf_event_read_value(pmc->perf_event, &enabled, &running);
+ * - arch/riscv/kvm/vcpu_pmu.c|625| <<kvm_riscv_vcpu_pmu_ctr_stop>> pmc->counter_val += perf_event_read_value(pmc->perf_event,
+ * - arch/x86/kvm/pmu.h|112| <<pmc_read_counter>> counter += perf_event_read_value(pmc->perf_event,
+ * - include/uapi/linux/bpf.h|5852| <<___BPF_FUNC_MAPPER>> FN(perf_event_read_value, 55, ##ctx) \
+ * - tools/include/uapi/linux/bpf.h|5852| <<___BPF_FUNC_MAPPER>> FN(perf_event_read_value, 55, ##ctx) \
+ */
if (pmc->perf_event)
counter += perf_event_read_value(pmc->perf_event, &enabled,
&running);
+ /*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|130| <<kvm_pmu_get_pmc_value>> if (!kvm_pmc_is_64bit(pmc))
+ * - arch/arm64/kvm/pmu-emul.c|463| <<kvm_pmu_counter_increment>> if (!kvm_pmc_is_64bit(pmc))
+ * - arch/arm64/kvm/pmu-emul.c|485| <<compute_period>> if (kvm_pmc_is_64bit(pmc) && kvm_pmc_has_64bit_overflow(pmc))
+ * - arch/arm64/kvm/pmu-emul.c|651| <<kvm_pmu_create_perf_event>> if (kvm_pmc_is_64bit(pmc))
+ */
if (!kvm_pmc_is_64bit(pmc))
counter = lower_32_bits(counter);
@@ -138,6 +329,11 @@ static u64 kvm_pmu_get_pmc_value(struct kvm_pmc *pmc)
* @vcpu: The vcpu pointer
* @select_idx: The counter index
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/sys_regs.c|1040| <<get_pmu_evcntr>> *val = kvm_pmu_get_counter_value(vcpu, idx);
+ * - arch/arm64/kvm/sys_regs.c|1091| <<access_pmu_evcntr>> p->regval = kvm_pmu_get_counter_value(vcpu, idx);
+ */
u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx)
{
if (!kvm_vcpu_has_pmu(vcpu))
@@ -146,11 +342,22 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx)
return kvm_pmu_get_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, select_idx));
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|187| <<kvm_pmu_set_counter_value>> kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, select_idx), val, false);
+ * - arch/arm64/kvm/pmu-emul.c|580| <<kvm_pmu_handle_pmcr>> kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, i), 0, true);
+ */
static void kvm_pmu_set_pmc_value(struct kvm_pmc *pmc, u64 val, bool force)
{
struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
u64 reg;
+ /*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|154| <<kvm_pmu_set_pmc_value>> kvm_pmu_release_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|223| <<kvm_pmu_stop_counter>> kvm_pmu_release_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|264| <<kvm_pmu_vcpu_destroy>> kvm_pmu_release_perf_event(kvm_vcpu_idx_to_pmc(vcpu, i));
+ */
kvm_pmu_release_perf_event(pmc);
reg = counter_index_to_reg(pmc->idx);
@@ -169,6 +376,13 @@ static void kvm_pmu_set_pmc_value(struct kvm_pmc *pmc, u64 val, bool force)
__vcpu_sys_reg(vcpu, reg) = val;
+ /*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|25| <<global>> static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc);
+ * - arch/arm64/kvm/pmu-emul.c|173| <<kvm_pmu_set_pmc_value>> kvm_pmu_create_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|303| <<kvm_pmu_enable_counter_mask>> kvm_pmu_create_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|690| <<kvm_pmu_set_counter_event_type>> kvm_pmu_create_perf_event(pmc);
+ */
/* Recreate the perf event to reflect the updated sample_period */
kvm_pmu_create_perf_event(pmc);
}
@@ -179,6 +393,11 @@ static void kvm_pmu_set_pmc_value(struct kvm_pmc *pmc, u64 val, bool force)
* @select_idx: The counter index
* @val: The counter value
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|574| <<kvm_pmu_handle_pmcr>> kvm_pmu_set_counter_value(vcpu, ARMV8_PMU_CYCLE_IDX, 0);
+ * - arch/arm64/kvm/sys_regs.c|1089| <<access_pmu_evcntr>> kvm_pmu_set_counter_value(vcpu, idx, p->regval);
+ */
void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)
{
if (!kvm_vcpu_has_pmu(vcpu))
@@ -191,10 +410,31 @@ void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)
* kvm_pmu_release_perf_event - remove the perf event
* @pmc: The PMU counter pointer
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|154| <<kvm_pmu_set_pmc_value>> kvm_pmu_release_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|223| <<kvm_pmu_stop_counter>> kvm_pmu_release_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|264| <<kvm_pmu_vcpu_destroy>> kvm_pmu_release_perf_event(kvm_vcpu_idx_to_pmc(vcpu, i));
+ */
static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc)
{
if (pmc->perf_event) {
perf_event_disable(pmc->perf_event);
+ /*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|386| <<kvm_pmu_release_perf_event>> perf_event_release_kernel(pmc->perf_event);
+ * - arch/riscv/kvm/vcpu_pmu.c|82| <<kvm_pmu_release_perf_event>> perf_event_release_kernel(pmc->perf_event);
+ * - arch/x86/kernel/cpu/resctrl/pseudo_lock.c|1058| <<measure_residency_fn>> perf_event_release_kernel(hit_event);
+ * - arch/x86/kernel/cpu/resctrl/pseudo_lock.c|1060| <<measure_residency_fn>> perf_event_release_kernel(miss_event);
+ * - arch/x86/kvm/pmu.c|281| <<pmc_release_perf_event>> perf_event_release_kernel(pmc->perf_event);
+ * - arch/x86/kvm/vmx/pmu_intel.c|198| <<intel_pmu_release_guest_lbr_event>> perf_event_release_kernel(lbr_desc->event);
+ * - kernel/events/core.c|5487| <<perf_release>> perf_event_release_kernel(file->private_data);
+ * - kernel/events/hw_breakpoint.c|829| <<unregister_hw_breakpoint>> perf_event_release_kernel(bp);
+ * - kernel/watchdog_perf.c|208| <<hardlockup_detector_perf_cleanup>> perf_event_release_kernel(event);
+ * - kernel/watchdog_perf.c|275| <<watchdog_hardlockup_probe>> perf_event_release_kernel(this_cpu_read(watchdog_ev));
+ *
+ * arm64只在这里调用release
+ */
perf_event_release_kernel(pmc->perf_event);
pmc->perf_event = NULL;
}
@@ -206,6 +446,11 @@ static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc)
*
* If this counter has been configured to monitor some event, release it here.
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|439| <<kvm_pmu_vcpu_reset>> kvm_pmu_stop_counter(kvm_vcpu_idx_to_pmc(vcpu, i));
+ * - arch/arm64/kvm/pmu-emul.c|825| <<kvm_pmu_create_perf_event>> kvm_pmu_stop_counter(pmc);
+ */
static void kvm_pmu_stop_counter(struct kvm_pmc *pmc)
{
struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
@@ -220,6 +465,12 @@ static void kvm_pmu_stop_counter(struct kvm_pmc *pmc)
__vcpu_sys_reg(vcpu, reg) = val;
+ /*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|154| <<kvm_pmu_set_pmc_value>> kvm_pmu_release_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|223| <<kvm_pmu_stop_counter>> kvm_pmu_release_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|264| <<kvm_pmu_vcpu_destroy>> kvm_pmu_release_perf_event(kvm_vcpu_idx_to_pmc(vcpu, i));
+ */
kvm_pmu_release_perf_event(pmc);
}
@@ -228,11 +479,26 @@ static void kvm_pmu_stop_counter(struct kvm_pmc *pmc)
* @vcpu: The vcpu pointer
*
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/arm.c|475| <<kvm_arch_vcpu_create>> kvm_pmu_vcpu_init(vcpu);
+ */
void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu)
{
int i;
struct kvm_pmu *pmu = &vcpu->arch.pmu;
+ /*
+ * struct kvm_vcpu:
+ * -> struct kvm_vcpu_arch arch;
+ * -> struct kvm_pmu pmu;
+ * -> struct irq_work overflow_work;
+ * -> struct kvm_pmu_events events;
+ * -> struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS];
+ * -> int irq_num;
+ * -> bool created;
+ * -> bool irq_level;
+ */
for (i = 0; i < ARMV8_PMU_MAX_COUNTERS; i++)
pmu->pmc[i].idx = i;
}
@@ -242,11 +508,20 @@ void kvm_pmu_vcpu_init(struct kvm_vcpu *vcpu)
* @vcpu: The vcpu pointer
*
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/reset.c|205| <<kvm_reset_vcpu>> kvm_pmu_vcpu_reset(vcpu);
+ */
void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu)
{
unsigned long mask = kvm_pmu_valid_counter_mask(vcpu);
int i;
+ /*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|439| <<kvm_pmu_vcpu_reset>> kvm_pmu_stop_counter(kvm_vcpu_idx_to_pmc(vcpu, i));
+ * - arch/arm64/kvm/pmu-emul.c|825| <<kvm_pmu_create_perf_event>> kvm_pmu_stop_counter(pmc);
+ */
for_each_set_bit(i, &mask, 32)
kvm_pmu_stop_counter(kvm_vcpu_idx_to_pmc(vcpu, i));
}
@@ -256,15 +531,38 @@ void kvm_pmu_vcpu_reset(struct kvm_vcpu *vcpu)
* @vcpu: The vcpu pointer
*
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/arm.c|508| <<kvm_arch_vcpu_destroy>> kvm_pmu_vcpu_destroy(vcpu);
+ */
void kvm_pmu_vcpu_destroy(struct kvm_vcpu *vcpu)
{
int i;
for (i = 0; i < ARMV8_PMU_MAX_COUNTERS; i++)
kvm_pmu_release_perf_event(kvm_vcpu_idx_to_pmc(vcpu, i));
+ /*
+ * 在以下使用kvm_pmu->overflow_work:
+ * - arch/arm64/kvm/pmu-emul.c|453| <<kvm_pmu_vcpu_destroy>> irq_work_sync(&vcpu->arch.pmu.overflow_work);
+ * - arch/arm64/kvm/pmu-emul.c|619| <<kvm_pmu_perf_overflow_notify_vcpu>> vcpu = container_of(work, struct kvm_vcpu, arch.pmu.overflow_work);
+ * - arch/arm64/kvm/pmu-emul.c|718| <<kvm_pmu_perf_overflow>> irq_work_queue(&vcpu->arch.pmu.overflow_work);
+ * - arch/arm64/kvm/pmu-emul.c|1092| <<kvm_arm_pmu_v3_init>> init_irq_work(&vcpu->arch.pmu.overflow_work, kvm_pmu_perf_overflow_notify_vcpu);
+ */
irq_work_sync(&vcpu->arch.pmu.overflow_work);
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|474| <<kvm_pmu_vcpu_reset>> unsigned long mask = kvm_pmu_valid_counter_mask(vcpu);
+ * - arch/arm64/kvm/pmu-emul.c|835| <<kvm_pmu_handle_pmcr>> unsigned long mask = kvm_pmu_valid_counter_mask(vcpu);
+ * - arch/arm64/kvm/pmu-emul.c|1076| <<kvm_vcpu_reload_pmu>> u64 mask = kvm_pmu_valid_counter_mask(vcpu);
+ * - arch/arm64/kvm/sys_regs.c|1146| <<set_pmreg>> val &= kvm_pmu_valid_counter_mask(vcpu);
+ * - arch/arm64/kvm/sys_regs.c|1169| <<get_pmreg>> u64 mask = kvm_pmu_valid_counter_mask(vcpu);
+ * - arch/arm64/kvm/sys_regs.c|1183| <<access_pmcnten>> mask = kvm_pmu_valid_counter_mask(vcpu);
+ * - arch/arm64/kvm/sys_regs.c|1206| <<access_pminten>> u64 mask = kvm_pmu_valid_counter_mask(vcpu);
+ * - arch/arm64/kvm/sys_regs.c|1230| <<access_pmovs>> u64 mask = kvm_pmu_valid_counter_mask(vcpu);
+ * - arch/arm64/kvm/sys_regs.c|1260| <<access_pmswinc>> mask = kvm_pmu_valid_counter_mask(vcpu);
+ */
u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu)
{
u64 val = FIELD_GET(ARMV8_PMU_PMCR_N, kvm_vcpu_read_pmcr(vcpu));
@@ -282,6 +580,11 @@ u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu)
*
* Call perf_event_enable to start counting the perf event
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|821| <<kvm_pmu_handle_pmcr>> kvm_pmu_enable_counter_mask(vcpu,
+ * - arch/arm64/kvm/sys_regs.c|1189| <<access_pmcnten>> kvm_pmu_enable_counter_mask(vcpu, val);
+ */
void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val)
{
int i;
@@ -300,8 +603,25 @@ void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val)
pmc = kvm_vcpu_idx_to_pmc(vcpu, i);
if (!pmc->perf_event) {
+ /*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|25| <<global>> static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc);
+ * - arch/arm64/kvm/pmu-emul.c|173| <<kvm_pmu_set_pmc_value>> kvm_pmu_create_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|303| <<kvm_pmu_enable_counter_mask>> kvm_pmu_create_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|690| <<kvm_pmu_set_counter_event_type>> kvm_pmu_create_perf_event(pmc);
+ */
kvm_pmu_create_perf_event(pmc);
} else {
+ /*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|541| <<kvm_pmu_enable_counter_mask>> perf_event_enable(pmc->perf_event);
+ * - arch/riscv/kvm/vcpu_pmu.c|336| <<kvm_pmu_create_perf_event>> perf_event_enable(pmc->perf_event);
+ * - arch/riscv/kvm/vcpu_pmu.c|553| <<kvm_riscv_vcpu_pmu_ctr_start>> perf_event_enable(pmc->perf_event);
+ * - arch/x86/kvm/pmu.c|272| <<pmc_resume_counter>> perf_event_enable(pmc->perf_event);
+ * - kernel/events/hw_breakpoint.c|815| <<modify_user_hw_breakpoint>> perf_event_enable(bp);
+ * - kernel/watchdog_perf.c|169| <<watchdog_hardlockup_enable>> perf_event_enable(this_cpu_read(watchdog_ev));
+ * - kernel/watchdog_perf.c|251| <<hardlockup_detector_perf_restart>> perf_event_enable(event);
+ */
perf_event_enable(pmc->perf_event);
if (pmc->perf_event->state != PERF_EVENT_STATE_ACTIVE)
kvm_debug("fail to enable perf event\n");
@@ -316,6 +636,11 @@ void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val)
*
* Call perf_event_disable to stop counting the perf event
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|824| <<kvm_pmu_handle_pmcr>> kvm_pmu_disable_counter_mask(vcpu, __vcpu_sys_reg(vcpu, PMCNTENSET_EL0));
+ * - arch/arm64/kvm/sys_regs.c|1194| <<access_pmcnten>> kvm_pmu_disable_counter_mask(vcpu, val);
+ */
void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val)
{
int i;
@@ -336,10 +661,61 @@ void kvm_pmu_disable_counter_mask(struct kvm_vcpu *vcpu, u64 val)
}
}
+/*
+ * PMOVSSET_EL0寄存器:
+ * PMOVSSET_EL0, Performance Monitors Overflow Flag Status Set Register
+ *
+ * Sets the state of the overflow bit for the Cycle Count Register,
+ * AArch64-PMCCNTR_EL0, and each of the implemented event counters
+ * AArch64-PMEVCNTR<n>_EL0.
+ *
+ * 可写可读, 每个bit表示一个event的overflow status
+ *
+ * -----------
+ *
+ * PMINTENSET_EL1寄存器:
+ * PMINTENSET_EL1, Performance Monitors Interrupt Enable Set Register
+ *
+ * Enables the generation of interrupt requests on overflows from the
+ * cycle counter, AArch64-PMCCNTR_EL0, and the event counters
+ * AArch64-PMEVCNTR<n>_EL0. Reading the register shows which overflow
+ * interrupt requests are enabled.
+ *
+ * 可读可写, 每个bit表示一个event overflow的时候中断吗
+ *
+ * -----------
+ *
+ * PMCNTENSET_EL0寄存器:
+ * PMCNTENSET_EL0, Performance Monitors Count Enable Set Register
+ *
+ * Enables the Cycle Count Register, AArch64-PMCCNTR_EL0, and any
+ * implemented event counters AArch64-PMEVCNTR<n>_EL0. Reading this
+ * register shows which counters are enabled.
+ *
+ * 可读可写, 激活对应的counter
+ *
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|596| <<kvm_pmu_update_state>> overflow = !!kvm_pmu_overflow_status(vcpu);
+ * - arch/arm64/kvm/pmu-emul.c|760| <<kvm_pmu_perf_overflow>> if (kvm_pmu_overflow_status(vcpu)) {
+ */
static u64 kvm_pmu_overflow_status(struct kvm_vcpu *vcpu)
{
u64 reg = 0;
+ /*
+ * 207 //
+ * 208 // Per-CPU PMCR: config reg
+ * 209 //
+ * 210 #define ARMV8_PMU_PMCR_E (1 << 0) // Enable all counters
+ * 211 #define ARMV8_PMU_PMCR_P (1 << 1) // Reset all counters