diff --git a/stalling_dataforwarding.py b/stalling_dataforwarding.py new file mode 100644 index 0000000..1e252a6 --- /dev/null +++ b/stalling_dataforwarding.py @@ -0,0 +1,265 @@ +from converttomachinecode1 import * +import globalss +import sys +from fetch1 import * +from decode1 import * +from execute1 import * +from memoryaccess1 import * +from registerupdate1 import * +import linecache +from error_handling import * +from print_the_instruction import * + +assign_labelled_instruction() +globalss.assign_register() +a=error_handling() +if a==1: + #print('not passed') + sys.exit() +#print('passed') +convert_to_machinecode() +globalss.assign_memory() +globalss.assign_stack() + +pipeline=[] +parameter=[] +lii_list=[] + +buffer=-1 +register_file=-1 +particular_instruction=-1 + +print("\n") +kn1 = input("Print register values after every cycle ? (y/n) ") +if kn1=="y": + buffer=1 + +kn2 = input("Print pipeline interstate buffer reg values after every cycle ? (y/n) ") +if kn2=="y": + register_file=1 + +particular_instruction = int(input("Enter specific instruction to see it's pipeline reg info :")) + + +current_string='' +file = open("instruction_data.txt","r+") +file.truncate(0) +file.close() + + +# printing the stats of program +cycle_count=0 +instructions_executed=0 +CPI=0 +load_store_count=0 +ALU_count=0 +control_instructions=0 +stalls=0 +data_hazard=0 +control_hazard=0 +stalls_data_hazard=0 +stalls_control_hazard=0 + + + + + + + +file2=open('machinecode.txt','r') +file6=open('Details.txt','w') +file8=open('Stats.txt','w') +i=1 +each=str(linecache.getline('machinecode.txt', i)) +flag=0 +flag1=0 +change=0 +while 1==1: + change=0 + global reg + reg.clear() + if each!='': + if flag==0: + each=each.split() + if (len(each)==1): + globalss.PC_execution=globalss.PC_execution+4 + i=int(globalss.PC_execution/4) +1 + each=(linecache.getline('machinecode.txt', i)) + continue + instructions_executed=instructions_executed+1 + if instructions_executed==particular_instruction: + current_string=str(fetch(each)) + parameter.append(0) + pipeline.append(list(reg)) + lii_list.append('') + else: + change=1 + + j=0 + if len(parameter)>0: + cycle_count=cycle_count+1 + if len(parameter)==0 : + break + flag=0 + while j