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Help needed #9

Answered by terminatorul
ngrfgt asked this question in Q&A
Feb 8, 2024 · 2 comments · 2 replies
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Please correct the following lines in LocalPciGpu.h header:

#define TARGET_BRIDGE_PCI_VENDOR_ID     0x1022u
#define TARGET_BRIDGE_PCI_DEVICE_ID     0x1483u

#define TARGET_BRIDGE_PCI_BUS           0x00u
#define TARGET_BRIDGE_PCI_DEVICE        0x03u
#define TARGET_BRIDGE_PCI_FUNCTION      0x01u

// Memory range and I/O port range (base + limit) mapped to bridge
// from CPU-Z .txt report of the bridge and GPU

// PCIe config register offset 0x20
#define TARGET_BRIDGE_MEM_BASE_LIMIT  UINT32_C(0xFC00'FB00)                 // Should cover the GPU BAR0

// PCIe config register offset 0x1C
#define TARGET_BRIDGE_IO_BASE_LIMIT   0xE1E1u

Build the DXE driver NvStrapsReBar.ffs again, and re-flash y…

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