This project ports an automatic analog layout generation tool called aloe to work with SkyWater 130 nm technology. Aloe uses a digital place and route tool together with a genetic algorithm to meet different analog layout specifications. Using this tool, we generated several layouts for a bandgap voltage reference (BGR) circuit on this chip, and we compared these with a manually laid out version from the previous offering of this course.
- Part A - BGR Circuit Understanding
- Part B - Analog Standard Cell (Stem Cell) Generation and Examples
Abstraction:
- We want a voltage generation circuit, which is independent of temperature.
- Idea 1: target_voltage = PTAT_voltage + CTAT_voltage
(PTAT: proportional to absolute temperature; CTAT: conversely proportional to absolute temperature)
Idea 2: target_voltage = R * (PTAT_current + CTAT_current)
Here we use Idea 2.
Conditions:
(1) Va = Vb
(2) Sizes of PMOS P1, P2, P3 are the same
(3) R1 = R2
Then:
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
$ git clone https://this_repo_link.git
$ cd Open-ALOE
$ source setup.csh
$ cd ./stem_cell_generator
$ sh run_generator.sh
For the BGR part, we referred bandgapReferenceCircuit. In the layout part, some of the tcl codes referred open-pmic.