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Removed support for VHDL architectures
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rodrigomelo9 committed Jun 24, 2024
1 parent 33ea70b commit cefcc9a
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Showing 6 changed files with 0 additions and 19 deletions.
1 change: 0 additions & 1 deletion docs/internals.rst
Original file line number Diff line number Diff line change
Expand Up @@ -60,7 +60,6 @@ Internal data structure
'DEF2': 'VAL2',
'DEF3': 'VAL3'
},
'arch': 'ARCHNAME',
'hooks': {
'precfg': ['CMD1', 'CMD2'],
'postcfg': ['CMD1', 'CMD2'],
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9 changes: 0 additions & 9 deletions pyfpga/project.py
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Expand Up @@ -153,15 +153,6 @@ def add_define(self, name, value):
self.logger.debug('Executing add_define')
self.data.setdefault('defines', {})[name] = value

def set_arch(self, name):
"""Set the VHDL architecture.
:param name: architecture name
:type name: str
"""
self.logger.debug('Executing set_arch')
self.data['arch'] = name

def add_fileset(self, pathname):
"""Add fileset file/s.
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4 changes: 0 additions & 4 deletions pyfpga/templates/vivado.jinja
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Expand Up @@ -32,10 +32,6 @@ set_property INCLUDE_DIRS { {{ INCLUDES}} } [current_fileset]
set_property GENERIC { {{ PARAMS }} } -objects [get_filesets sources_1]
{% endif %}

{% if ARCH %}
set_property TOP_ARCH {{ ARCH }} [current_fileset]
{% endif %}

{{ POSTCFG }}

close_project
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2 changes: 0 additions & 2 deletions pyfpga/vivado.py
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Expand Up @@ -67,8 +67,6 @@ def _make_prepare(self, steps):
for key, value in self.data['params'].items():
params.append(f'{key}={value}')
context['PARAMS'] = ' '.join(params)
if 'arch' in self.data:
context['ARCH'] = self.data['arch']
if 'hooks' in self.data:
for stage in self.data['hooks']:
context[stage.upper()] = '\n'.join(self.data['hooks'][stage])
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2 changes: 0 additions & 2 deletions tests/test_data.py
Original file line number Diff line number Diff line change
Expand Up @@ -45,7 +45,6 @@
'DEF2': 'VAL2',
'DEF3': 'VAL3'
},
'arch': 'ARCHNAME',
'hooks': {
'precfg': ['CMD1', 'CMD2'],
'postcfg': ['CMD1', 'CMD2'],
Expand All @@ -63,7 +62,6 @@ def test_data():
prj = Project()
prj.set_part('PARTNAME')
prj.set_top('TOPNAME')
prj.set_arch('ARCHNAME')
prj.add_include('fakedata/dir1')
prj.add_include('fakedata/dir2')
prj.add_include('fakedata/dir3')
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1 change: 0 additions & 1 deletion tests/test_vivado.py
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,6 @@ def test_vivado():
prj = Vivado()
prj.set_part('PARTNAME')
prj.set_top('TOPNAME')
prj.set_arch('ARCHNAME')
prj.add_include('fakedata/dir1')
prj.add_include('fakedata/dir2')
prj.add_slog('fakedata/**/*.sv')
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