Merge branch 'develop'

src/basic.asm

@@ -53,9 +53,9 @@ TickTest:
 	check_timer .tick_loop, nz
 	ld hl, hTestResult
 	call PrintTime
-	cpw de, 9950
+	cpw de, 9990
 	ret c
-	cpw de, 10051
+	cpw de, 10011
 	ccf
 	ret
 

src/header.asm

@@ -59,9 +59,16 @@ CarryIfNonZero:
 
 	assert @ == $38 ;we're not going to call this, so the assert is necessary
 CrashFF:
-	rst Crash
+	jr Crash
 
-	ds 7
+ExitTimedWait:
+	; the three nops are here for timing reasons (see wait.asm)
+	nop
+	nop
+	nop
+	pop hl
+	pop bc
+	ret
 
 	assert @ == $40
 VBlank:

src/subsec.asm

@@ -85,9 +85,9 @@ LongSecondWrite:
 .done
 	ld hl, hTestResult
 	call PrintTime
-	cpw de, 9920
+	cpw de, 9985
 	ret c
-	cpw de, 10081
+	cpw de, 10016
 	ccf
 	ret
 
@@ -135,9 +135,9 @@ ___test_sub_second_register_write: MACRO
 	check_timer .check, nz
 	ld hl, hTestResult
 	call PrintTime
-	cpw de, (\2) * 500 - 80
+	cpw de, (\2) * 500 - 15
 	ret c
-	cpw de, (\2) * 500 + 81
+	cpw de, (\2) * 500 + 16
 	ccf
 	ret
 ENDM
@@ -194,8 +194,8 @@ RTCOffTimingTest:
 	check_timer .check, nz
 	ld hl, hTestResult
 	call PrintTime
-	cpw de, 3920
+	cpw de, 3985
 	ret c
-	cpw de, 4081
+	cpw de, 4016
 	ccf
 	ret

src/wait.asm

@@ -54,9 +54,9 @@ WaitATimes50ms:
 	add hl, hl ;dummy instruction to make up for the two lost cycles for jumps not taken
 .no_extra
 	; remaining: 166 - b cycles (b <= 51)
-	ld a, 138
+	ld a, 140
 	sub b
-	; remaining: 163 - b = a + 25 cycles
+	; remaining: 163 - b = a + 23 cycles
 	ld b, a
 	srl b
 	srl b
@@ -66,19 +66,11 @@ WaitATimes50ms:
 	; loop total: 4 cycles (times a & ~3 iterations)
 	cpl
 	and 3
-	; remaining: (a ^ 3) + 18 cycles
-	add a, LOW(.exit)
+	; remaining: (a ^ 3) + 16 cycles
+	assert ExitTimedWait < $100 ;this means the addition cannot overflow (because the header is at $100)
+	add a, ExitTimedWait
 	ld l, a
-	adc HIGH(.exit)
-	sub l
-	ld h, a
+	ld h, 0
 	jp hl
 	; remaining: (old a ^ 3) + 10 cycles - exactly enough for 0-3 nops, two pops and a ret
-
-.exit
-	nop
-	nop
-	nop
-	pop hl
-	pop bc
-	ret
+	; note: ExitTimedWait is before the ROM header (see header.asm)

tests.md

@@ -33,7 +33,7 @@ Some behaviors are very common in tests, and thus they are given short attribute
 ## Basic tests
 
 * **RTC on** (pass/fail): enables the RTC (by setting bit 6 of the control register) and waits for it to tick.
-* **Tick** (conditional): evaluates the time taken between successive ticks. (expected: 1000ms, tolerance: 5ms)
+* **Tick** (conditional): evaluates the time taken between successive ticks. (expected: 1000ms, tolerance: 1ms)
 * **RTC off** (pass/fail): disables the RTC and waits approximately four seconds for it to tick. The test fails if the
   RTC ticks.
 * **Register writes** (register list): generates a random new RTC state (ensuring that all values are different from
@@ -86,7 +86,7 @@ These tests are named after the register that is written to and the time remaini
 tick at the time of writing. For instance, the RTCS/900 test will write to the seconds register when the next tick is
 900ms away (i.e., 100ms after a tick).
 
-The tolerance is 8ms for all tests. The tests are:
+The tolerance is 1.5ms for all tests. The tests are:
 
 * **RTCS/500** (expected: 1000ms)
 * **RTCS/900** (expected: 1000ms)