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samples: drivers: mbox: Update mbox sample to work with nRF54L15
Update mbox sample configuration to work with production board and SoC. Signed-off-by: Karol Lasończyk <[email protected]>
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20 changes: 20 additions & 0 deletions
20
samples/drivers/mbox/boards/nrf54l15dk_nrf54l15_cpuapp.overlay
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,20 @@ | ||
| /* | ||
| * Copyright 2024 Nordic Semiconductor ASA | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
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| / { | ||
| mbox-consumer { | ||
| compatible = "vnd,mbox-consumer"; | ||
| mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>; | ||
| mbox-names = "rx", "tx"; | ||
| }; | ||
| }; | ||
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| &cpuapp_vevif_rx { | ||
| status = "okay"; | ||
| }; | ||
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| &cpuapp_vevif_tx { | ||
| status = "okay"; | ||
| }; |
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24 changes: 24 additions & 0 deletions
24
samples/drivers/mbox/remote/boards/nrf54l15dk_nrf54l15_cpuflpr.overlay
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,24 @@ | ||
| /* | ||
| * Copyright 2024 Nordic Semiconductor ASA | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
|
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| / { | ||
| mbox-consumer { | ||
| compatible = "vnd,mbox-consumer"; | ||
| mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>; | ||
| mbox-names = "rx", "tx"; | ||
| }; | ||
| }; | ||
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| &cpuflpr_vevif_rx { | ||
| status = "okay"; | ||
| }; | ||
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| &cpuflpr_vevif_tx { | ||
| status = "okay"; | ||
| }; | ||
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| &uart30 { | ||
| /delete-property/ hw-flow-control; | ||
| }; |
29 changes: 29 additions & 0 deletions
29
snippets/nordic-flpr-xip/boards/nrf54l15dk_nrf54l15_cpuapp.overlay
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,29 @@ | ||
| /* | ||
| * Copyright (c) 2024 Nordic Semiconductor | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
|
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| / { | ||
| soc { | ||
| reserved-memory { | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
| cpuflpr_code_partition: image@165000 { | ||
| /* FLPR core code partition */ | ||
| reg = <0x165000 DT_SIZE_K(96)>; | ||
| }; | ||
| }; | ||
| }; | ||
| }; | ||
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| &uart30 { | ||
| status = "reserved"; | ||
| }; | ||
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| &cpuflpr_vpr { | ||
| execution-memory = <&cpuflpr_code_partition>; | ||
| }; | ||
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| &cpuapp_vevif_tx { | ||
| status = "okay"; | ||
| }; |
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43 changes: 43 additions & 0 deletions
43
snippets/nordic-flpr/boards/nrf54l15dk_nrf54l15_cpuapp.overlay
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,43 @@ | ||
| /* | ||
| * Copyright (c) 2024 Nordic Semiconductor | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| */ | ||
|
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| / { | ||
| soc { | ||
| reserved-memory { | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
| cpuflpr_code_partition: image@165000 { | ||
| /* FLPR core code partition */ | ||
| reg = <0x165000 DT_SIZE_K(96)>; | ||
| }; | ||
| }; | ||
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| cpuflpr_sram_code_data: memory@20028000 { | ||
| compatible = "mmio-sram"; | ||
| reg = <0x20028000 DT_SIZE_K(96)>; | ||
| #address-cells = <1>; | ||
| #size-cells = <1>; | ||
| ranges = <0x0 0x20028000 0x18000>; | ||
| }; | ||
| }; | ||
| }; | ||
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| &uart30 { | ||
| status = "reserved"; | ||
| }; | ||
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| &cpuapp_sram { | ||
| reg = <0x20000000 DT_SIZE_K(160)>; | ||
| ranges = <0x0 0x20000000 0x28000>; | ||
| }; | ||
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| &cpuflpr_vpr { | ||
| execution-memory = <&cpuflpr_sram_code_data>; | ||
| source-memory = <&cpuflpr_code_partition>; | ||
| }; | ||
|
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| &cpuapp_vevif_tx { | ||
| status = "okay"; | ||
| }; |
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