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attempt to warn (BX_ERROR) for unsupported read/write size
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Shwartsman committed Dec 15, 2023
1 parent 30db11d commit 438fd78
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Showing 4 changed files with 74 additions and 65 deletions.
17 changes: 13 additions & 4 deletions bochs/iodev/display/banshee.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -834,12 +834,15 @@ void bx_banshee_c::mem_read(bx_phy_address addr, unsigned len, void *data)
*((Bit8u*)data) = (Bit8u)value;
break;
case 3:
*((Bit8u*)data + 2) = (Bit8u)(value >> 16);
*((Bit8u*)data + 2) = (Bit8u)(value >> 16); // Q: how to handle this on BIG_ENDIAN platform ?
// fall through
case 2:
*((Bit16u*)data) = (Bit16u)value;
break;
default:
case 4:
*((Bit32u*)data) = (Bit32u)value;
default:
BX_ERROR(("bx_banshee_c::mem_read unsupported length %d", len));
}
return;
}
Expand Down Expand Up @@ -888,8 +891,11 @@ void bx_banshee_c::mem_read(bx_phy_address addr, unsigned len, void *data)
case 4:
*((Bit32u*)data) = (Bit32u)value;
break;
default:
case 8:
*((Bit64u*)data) = value;
break;
default:
BX_ERROR(("bx_banshee_c::mem_read unsupported length %d", len));
}
}

Expand All @@ -906,8 +912,11 @@ void bx_banshee_c::mem_write(bx_phy_address addr, unsigned len, void *data)
case 2:
value = *(Bit16u*)data;
break;
default:
case 4:
value = *(Bit32u*)data;
break;
default:
BX_ERROR(("bx_banshee_c::mem_write unsupported length %d", len));
}
if ((addr & ~0x1ffffff) == pci_bar[0].addr) {
if (offset < 0x80000) {
Expand Down
7 changes: 3 additions & 4 deletions bochs/iodev/display/vga.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -325,8 +325,8 @@ void bx_vga_c::update(void)
bx_svga_tileinfo_t info;
Bit8u dac_size = BX_VGA_THIS vbe.dac_8bit ? 8 : 6;

iWidth=BX_VGA_THIS vbe.xres;
iHeight=BX_VGA_THIS vbe.yres;
iWidth = BX_VGA_THIS vbe.xres;
iHeight = BX_VGA_THIS vbe.yres;
pitch = BX_VGA_THIS s.line_offset;
Bit8u *disp_ptr = &BX_VGA_THIS s.memory[BX_VGA_THIS vbe.virtual_start];

Expand Down Expand Up @@ -695,8 +695,7 @@ void bx_vga_c::mem_write(bx_phy_address addr, Bit8u value)
bx_vgacore_c::mem_write(addr, value);
}

void bx_vga_c::redraw_area(unsigned x0, unsigned y0, unsigned width,
unsigned height)
void bx_vga_c::redraw_area(unsigned x0, unsigned y0, unsigned width, unsigned height)
{
unsigned xti, yti, xt0, xt1, yt0, yt1, xmax, ymax;

Expand Down
38 changes: 21 additions & 17 deletions bochs/iodev/usb/usb_ehci.cc
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Original file line number Diff line number Diff line change
Expand Up @@ -893,16 +893,20 @@ bool bx_usb_ehci_c::read_handler(bx_phy_address addr, unsigned len, void *data,
val &= 0xFFFF;
*((Bit16u *) data) = (Bit16u) val;
break;
case 8:
*((Bit32u *) ((Bit8u *) data + 4)) = val_hi;
case 4:
*((Bit32u *) data) = val;
*((Bit32u *) data) = (Bit32u) val;
break;
case 8:
*((Bit64u *) data) = GET64_FROM_HI32_LO32(val_hi, val);
break;
default:
BX_ERROR(("bx_usb_ehci_c::read_handler unsupported length %d", len));
}

#if BX_PHY_ADDRESS_LONG
BX_DEBUG(("register read from offset 0x%04X: 0x%08X%08X (len=%d)", offset, (Bit32u) val_hi, (Bit32u) val, len));
BX_DEBUG(("register read from offset 0x%04X: 0x%08X%08X (len=%d)", offset, (Bit32u) val_hi, (Bit32u) val, len));
#else
BX_DEBUG(("register read from offset 0x%04X: 0x%08X (len=%d)", offset, (Bit32u) val, len));
BX_DEBUG(("register read from offset 0x%04X: 0x%08X (len=%d)", offset, (Bit32u) val, len));
#endif

return 1;
Expand All @@ -911,26 +915,26 @@ bool bx_usb_ehci_c::read_handler(bx_phy_address addr, unsigned len, void *data,
bool bx_usb_ehci_c::write_handler(bx_phy_address addr, unsigned len, void *data, void *param)
{
Bit32u value = *((Bit32u *) data);
Bit32u value_hi = *((Bit32u *) ((Bit8u *) data + 4));
Bit32u value_hi = *((Bit32u *) ((Bit8u *) data + 4)); // Q: should value and value_hi to be swapped on BIG_ENDIAN platform ?
bool oldcfg, oldpo, oldpr, oldfpr;
int i, port;
const Bit32u offset = (Bit32u) (addr - BX_EHCI_THIS pci_bar[0].addr);

// modify val and val_hi per len of data to write
switch (len) {
case 1:
value &= 0xFF;
case 2:
value &= 0xFFFF;
case 4:
value_hi = 0;
break;
case 1:
value &= 0xFF;
case 2:
value &= 0xFFFF;
case 4:
value_hi = 0;
break;
}

#if BX_PHY_ADDRESS_LONG
BX_DEBUG(("register write to offset 0x%04X: 0x%08X%08X (len=%d)", offset, value_hi, value, len));
BX_DEBUG(("register write to offset 0x%04X: 0x%08X%08X (len=%d)", offset, value_hi, value, len));
#else
BX_DEBUG(("register write to offset 0x%04X: 0x%08X (len=%d)", offset, value, len));
BX_DEBUG(("register write to offset 0x%04X: 0x%08X (len=%d)", offset, value, len));
#endif

if (offset >= OPS_REGS_OFFSET) {
Expand Down Expand Up @@ -1043,10 +1047,10 @@ bool bx_usb_ehci_c::write_handler(bx_phy_address addr, unsigned len, void *data,

void bx_usb_ehci_c::update_irq(void)
{
bool level = 0;
bool level = false;

if ((BX_EHCI_THIS hub.op_regs.UsbSts.inti & BX_EHCI_THIS hub.op_regs.UsbIntr) > 0) {
level = 1;
level = true;
BX_DEBUG(("Interrupt Fired."));
}
DEV_pci_set_irq(BX_EHCI_THIS devfunc, BX_EHCI_THIS pci_conf[0x3d], level);
Expand Down
77 changes: 37 additions & 40 deletions bochs/iodev/usb/usb_xhci.cc
View file
Original file line number Diff line number Diff line change
Expand Up @@ -1173,10 +1173,9 @@ bool bx_usb_xhci_c::read_handler(bx_phy_address addr, unsigned len, void *data,
break;
#endif
}
} else

}
// Operational Registers
if ((offset >= OPS_REGS_OFFSET) && (offset < (OPS_REGS_OFFSET + 0x40))) {
else if ((offset >= OPS_REGS_OFFSET) && (offset < (OPS_REGS_OFFSET + 0x40))) {
switch (offset - OPS_REGS_OFFSET) {
case 0x00: // Command
#if ((VERSION_MAJOR == 1) && (VERSION_MINOR >= 0x10))
Expand Down Expand Up @@ -1274,10 +1273,9 @@ bool bx_usb_xhci_c::read_handler(bx_phy_address addr, unsigned len, void *data,
| (BX_XHCI_THIS hub.op_regs.HcConfig.MaxSlotsEn << 0);
break;
}
} else

}
// Register Port Sets
if ((offset >= PORT_SET_OFFSET) && (offset < (PORT_SET_OFFSET + (BX_XHCI_THIS hub.n_ports * 16)))) {
else if ((offset >= PORT_SET_OFFSET) && (offset < (PORT_SET_OFFSET + (BX_XHCI_THIS hub.n_ports * 16)))) {
unsigned port = (((offset - PORT_SET_OFFSET) >> 4) & 0x3F); // calculate port number
if (BX_XHCI_THIS hub.usb_port[port].portsc.pp) {
// the speed field is only valid for USB3 before a port reset. If a reset has not
Expand Down Expand Up @@ -1344,11 +1342,13 @@ bool bx_usb_xhci_c::read_handler(bx_phy_address addr, unsigned len, void *data,
#endif
break;
}
} else val = 0;
} else

}
else {
val = 0;
}
}
// Extended Capabilities
if ((offset >= EXT_CAPS_OFFSET) && (offset < (EXT_CAPS_OFFSET + EXT_CAPS_SIZE))) {
else if ((offset >= EXT_CAPS_OFFSET) && (offset < (EXT_CAPS_OFFSET + EXT_CAPS_SIZE))) {
unsigned caps_offset = (offset - EXT_CAPS_OFFSET);
switch (len) {
case 1:
Expand All @@ -1370,10 +1370,9 @@ bool bx_usb_xhci_c::read_handler(bx_phy_address addr, unsigned len, void *data,
(BX_XHCI_THIS hub.extended_caps[caps_offset + 3] << 24));
break;
}
} else

}
// Host Controller Runtime Registers
if ((offset >= RUNTIME_OFFSET) && (offset < (RUNTIME_OFFSET + 32 + (INTERRUPTERS * 32)))) {
else if ((offset >= RUNTIME_OFFSET) && (offset < (RUNTIME_OFFSET + 32 + (INTERRUPTERS * 32)))) {
if (offset == RUNTIME_OFFSET) {
val = (BX_XHCI_THIS hub.runtime_regs.mfindex.RsvdP << 14)
| (BX_XHCI_THIS hub.runtime_regs.mfindex.index << 0);
Expand Down Expand Up @@ -1436,10 +1435,9 @@ bool bx_usb_xhci_c::read_handler(bx_phy_address addr, unsigned len, void *data,
break;
}
}
} else

}
// Doorbell Registers (return zero when read)
if ((offset >= DOORBELL_OFFSET) && (offset < (DOORBELL_OFFSET + 4 + (INTERRUPTERS * 4)))) {
else if ((offset >= DOORBELL_OFFSET) && (offset < (DOORBELL_OFFSET + 4 + (INTERRUPTERS * 4)))) {
val = 0;
} else {
#if BX_PHY_ADDRESS_LONG
Expand All @@ -1459,11 +1457,14 @@ bool bx_usb_xhci_c::read_handler(bx_phy_address addr, unsigned len, void *data,
val &= 0xFFFF;
*((Bit16u *) data) = (Bit16u) val;
break;
case 8:
*((Bit32u *) ((Bit8u *) data + 4)) = val_hi;
case 4:
*((Bit32u *) data) = val;
*((Bit32u *) data) = (Bit32u) val;
break;
case 8:
*((Bit64u *) data) = GET64_FROM_HI32_LO32(val_hi, val);
break;
default:
BX_ERROR(("bx_usb_ehci_c::read_handler unsupported length %d", len));
}

// don't populate the log file if reading from interrupter's IMAN and only INT_ENABLE is set.
Expand All @@ -1484,7 +1485,7 @@ bool bx_usb_xhci_c::read_handler(bx_phy_address addr, unsigned len, void *data,
bool bx_usb_xhci_c::write_handler(bx_phy_address addr, unsigned len, void *data, void *param)
{
Bit32u value = *((Bit32u *) data);
Bit32u value_hi = *((Bit32u *) ((Bit8u *) data + 4));
Bit32u value_hi = *((Bit32u *) ((Bit8u *) data + 4)); // Q: should value and value_hi to be swapped on BIG_ENDIAN platform ?
const Bit32u offset = (Bit32u) (addr - BX_XHCI_THIS pci_bar[0].addr);
Bit32u temp;
int i;
Expand All @@ -1501,11 +1502,11 @@ bool bx_usb_xhci_c::write_handler(bx_phy_address addr, unsigned len, void *data,
}

#if BX_PHY_ADDRESS_LONG
BX_DEBUG(("register write to offset 0x%04X: 0x%08X%08X (len=%d)", offset, value_hi, value, len));
BX_DEBUG(("register write to offset 0x%04X: 0x%08X%08X (len=%d)", offset, value_hi, value, len));
#else
BX_DEBUG(("register write to offset 0x%04X: 0x%08X (len=%d)", offset, value, len));
if (len > 4)
BX_DEBUG(("Ben: In 32-bit mode, len > 4! (len=%d)", len));
BX_DEBUG(("register write to offset 0x%04X: 0x%08X (len=%d)", offset, value, len));
if (len > 4)
BX_DEBUG(("Ben: In 32-bit mode, len > 4! (len=%d)", len));
#endif

// Even though the controller allows reads other than 32-bits & on odd boundaries,
Expand All @@ -1526,10 +1527,9 @@ bool bx_usb_xhci_c::write_handler(bx_phy_address addr, unsigned len, void *data,
BX_ERROR(("Write to Read Only Host Capability Register (0x%08X)", offset));
break;
}
} else

}
// Operational Registers
if ((offset >= OPS_REGS_OFFSET) && (offset < (OPS_REGS_OFFSET + 0x40))) {
else if ((offset >= OPS_REGS_OFFSET) && (offset < (OPS_REGS_OFFSET + 0x40))) {
switch (offset - OPS_REGS_OFFSET) {
case 0x00: // Command
temp = BX_XHCI_THIS hub.op_regs.HcCommand.RsvdP1;
Expand Down Expand Up @@ -1747,10 +1747,9 @@ bool bx_usb_xhci_c::write_handler(bx_phy_address addr, unsigned len, void *data,
BX_XHCI_THIS hub.op_regs.HcConfig.MaxSlotsEn = (value & 0xFF);
break;
}
} else

}
// Register Port Sets
if ((offset >= PORT_SET_OFFSET) && (offset < (PORT_SET_OFFSET + (BX_XHCI_THIS hub.n_ports * 16)))) {
else if ((offset >= PORT_SET_OFFSET) && (offset < (PORT_SET_OFFSET + (BX_XHCI_THIS hub.n_ports * 16)))) {
unsigned port = (((offset - PORT_SET_OFFSET) >> 4) & 0x3F); // calculate port number
switch (offset & 0x0000000F) {
case 0x00:
Expand Down Expand Up @@ -1875,10 +1874,9 @@ bool bx_usb_xhci_c::write_handler(bx_phy_address addr, unsigned len, void *data,
#endif
break;
}
} else

}
// Extended Capabilities
if ((offset >= EXT_CAPS_OFFSET) && (offset < (EXT_CAPS_OFFSET + EXT_CAPS_SIZE))) {
else if ((offset >= EXT_CAPS_OFFSET) && (offset < (EXT_CAPS_OFFSET + EXT_CAPS_SIZE))) {
unsigned caps_offset = (offset - EXT_CAPS_OFFSET);
Bit64u qword = (((Bit64u) value_hi << 32) | value);
while (len) {
Expand All @@ -1895,10 +1893,9 @@ bool bx_usb_xhci_c::write_handler(bx_phy_address addr, unsigned len, void *data,
caps_offset++;
qword >>= 8;
}
} else

}
// Host Controller Runtime Registers
if ((offset >= RUNTIME_OFFSET) && (offset < (RUNTIME_OFFSET + 32 + (INTERRUPTERS * 32)))) {
else if ((offset >= RUNTIME_OFFSET) && (offset < (RUNTIME_OFFSET + 32 + (INTERRUPTERS * 32)))) {
if (offset == RUNTIME_OFFSET) {
BX_ERROR(("Write to MFINDEX register"));
} else if (offset < (RUNTIME_OFFSET + 32)) {
Expand Down Expand Up @@ -1981,10 +1978,9 @@ bool bx_usb_xhci_c::write_handler(bx_phy_address addr, unsigned len, void *data,
break;
}
}
} else

}
// Doorbell Registers
if ((offset >= DOORBELL_OFFSET) && (offset < (DOORBELL_OFFSET + 4 + (INTERRUPTERS * 4)))) {
else if ((offset >= DOORBELL_OFFSET) && (offset < (DOORBELL_OFFSET + 4 + (INTERRUPTERS * 4)))) {
if (value & (0xFF << 8))
BX_ERROR(("RsvdZ field of Doorbell written as non zero."));
unsigned doorbell = ((offset - DOORBELL_OFFSET) >> 2);
Expand Down Expand Up @@ -2053,8 +2049,9 @@ bool bx_usb_xhci_c::write_handler(bx_phy_address addr, unsigned len, void *data,
#endif
}
}
} else
} else {
BX_ERROR(("register write to unknown offset 0x%08X: 0x%08X%08X (len=%d)", offset, (Bit32u) value_hi, (Bit32u) value, len));
}

return 1;
}
Expand Down

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