introduce GET64_FROM_HI32_LO32 to form 64-bit integer from 2 32-bit

bochs/config.h.in

@@ -465,6 +465,8 @@
 #define GET32L(val64) ((Bit32u)(((Bit64u)(val64)) & 0xFFFFFFFF))
 #define GET32H(val64) ((Bit32u)(((Bit64u)(val64)) >> 32))
 
+#define GET64_FROM_HI32_LO32(hi, lo) (Bit64u(lo) | (Bit64u(hi) << 32))
+
 // now that Bit32u and Bit64u exist, defined bx_address
 #if BX_SUPPORT_X86_64
 typedef Bit64u bx_address;

bochs/cpu/apic.cc

@@ -1239,7 +1239,7 @@ bool bx_local_apic_c::read_x2apic(unsigned index, Bit64u *val_64)
     break;
   // full 64-bit access to ICR
   case BX_LAPIC_ICR_LO:
-    *val_64 = ((Bit64u) icr_lo) | (((Bit64u) icr_hi) << 32);
+    *val_64 = GET64_FROM_HI32_LO32(icr_hi, icr_lo);
     break;
   // not supported/not readable in x2apic mode
   case BX_LAPIC_ARBITRATION_PRIORITY:

bochs/cpu/arith32.cc

@@ -582,11 +582,11 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG8B(bxInstruction_c *i)
 
   // check write permission for following write
   Bit64u op1_64 = read_RMW_virtual_qword(i->seg(), eaddr);
-  Bit64u op2_64 = ((Bit64u) EDX << 32) | EAX;
+  Bit64u op2_64 = GET64_FROM_HI32_LO32(EDX, EAX);
 
   if (op1_64 == op2_64) {  // if accumulator == dest
     // dest <-- src (ECX:EBX)
-    op2_64 = ((Bit64u) ECX << 32) | EBX;
+    op2_64 = GET64_FROM_HI32_LO32(ECX, EBX);
     write_RMW_linear_qword(op2_64);
     assert_ZF();
   }

bochs/cpu/cpu.h

@@ -1054,12 +1054,11 @@ class BOCHSAPI BX_CPU_C : public logfunctions {
     BX_ACTIVITY_STATE_HLT,
     BX_ACTIVITY_STATE_SHUTDOWN,
     BX_ACTIVITY_STATE_WAIT_FOR_SIPI,
+    BX_VMX_LAST_ACTIVITY_STATE = BX_ACTIVITY_STATE_WAIT_FOR_SIPI,
     BX_ACTIVITY_STATE_MWAIT,
     BX_ACTIVITY_STATE_MWAIT_IF
   };
 
-#define BX_VMX_LAST_ACTIVITY_STATE (BX_ACTIVITY_STATE_WAIT_FOR_SIPI)
-
   unsigned activity_state;
 
 #define BX_EVENT_NMI                          (1 <<  0)

bochs/cpu/msr.cc

@@ -1172,7 +1172,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::WRMSR(bxInstruction_c *i)
 
   invalidate_prefetch_q();
 
-  Bit64u val_64 = ((Bit64u) EDX << 32) | EAX;
+  Bit64u val_64 = GET64_FROM_HI32_LO32(EDX, EAX);
   Bit32u index = ECX;
 
 #if BX_SUPPORT_SVM
@@ -1251,9 +1251,9 @@ int BX_CPU_C::load_MSRs(const char *file)
         reset_hi, reset_lo, rsrv_hi, rsrv_lo, ignr_hi, ignr_lo));
 
       BX_CPU_THIS_PTR msrs[index] = new MSR(index, type,
-        ((Bit64u)(reset_hi) << 32) | reset_lo,
-        ((Bit64u) (rsrv_hi) << 32) | rsrv_lo,
-        ((Bit64u) (ignr_hi) << 32) | ignr_lo);
+        GET64_FROM_HI32_LO32(reset_hi, reset_lo),
+        GET64_FROM_HI32_LO32(rsrv_hi, rsrv_lo),
+        GET64_FROM_HI32_LO32(ignr_hi, ignr_lo));
     }
   } while (!feof(fd));
 

bochs/cpu/mult32.cc

@@ -80,7 +80,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::DIV_EAXEdR(bxInstruction_c *i)
     exception(BX_DE_EXCEPTION, 0);
   }
 
-  Bit64u op1_64 = (((Bit64u) EDX) << 32) + ((Bit64u) EAX);
+  Bit64u op1_64 = GET64_FROM_HI32_LO32(EDX, EAX);
 
   Bit64u quotient_64  = op1_64 / op2_32;
   Bit32u remainder_32 = (Bit32u) (op1_64 % op2_32);
@@ -104,7 +104,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::DIV_EAXEdR(bxInstruction_c *i)
 
 void BX_CPP_AttrRegparmN(1) BX_CPU_C::IDIV_EAXEdR(bxInstruction_c *i)
 {
-  Bit64s op1_64 = (((Bit64u) EDX) << 32) | ((Bit64u) EAX);
+  Bit64s op1_64 = GET64_FROM_HI32_LO32(EDX, EAX);
 
   /* check MIN_INT case */
   if (op1_64 == ((Bit64s)BX_CONST64(0x8000000000000000)))

bochs/cpu/vmx.h

@@ -961,7 +961,7 @@ const Bit32u BX_VMCS_SHADOW_BIT_MASK = 0x80000000;
      (is_cpu_extension_supported(BX_ISA_CET) ? (1<<24) : 0)
 
 #define VMX_MSR_VMX_BASIC \
-   ((((Bit64u) VMX_MSR_VMX_BASIC_HI) << 32) | VMX_MSR_VMX_BASIC_LO)
+   GET64_FROM_HI32_LO32(VMX_MSR_VMX_BASIC_HI, VMX_MSR_VMX_BASIC_LO)
 
 
 // ------------------------------------------------------------------------
@@ -992,7 +992,7 @@ const Bit32u VMX_MSR_VMX_PINBASED_CTRLS_LO = 0x00000016;
        (VMX_VM_EXEC_CTRL1_SUPPORTED_BITS | VMX_MSR_VMX_PINBASED_CTRLS_LO)
 
 #define VMX_MSR_VMX_PINBASED_CTRLS \
-   ((((Bit64u) VMX_MSR_VMX_PINBASED_CTRLS_HI) << 32) | VMX_MSR_VMX_PINBASED_CTRLS_LO)
+   GET64_FROM_HI32_LO32(VMX_MSR_VMX_PINBASED_CTRLS_HI, VMX_MSR_VMX_PINBASED_CTRLS_LO)
 
 // IA32_MSR_VMX_TRUE_PINBASED_CTRLS MSR (0x48d)
 // --------------------------------
@@ -1002,7 +1002,7 @@ const Bit32u VMX_MSR_VMX_PINBASED_CTRLS_LO = 0x00000016;
 #define VMX_MSR_VMX_TRUE_PINBASED_CTRLS_HI (VMX_MSR_VMX_PINBASED_CTRLS_HI)
 
 #define VMX_MSR_VMX_TRUE_PINBASED_CTRLS \
-   ((((Bit64u) VMX_MSR_VMX_TRUE_PINBASED_CTRLS_HI) << 32) | VMX_MSR_VMX_TRUE_PINBASED_CTRLS_LO)
+   GET64_FROM_HI32_LO32(VMX_MSR_VMX_TRUE_PINBASED_CTRLS_HI, VMX_MSR_VMX_TRUE_PINBASED_CTRLS_LO)
 
 
 // IA32_MSR_VMX_PROCBASED_CTRLS MSR (0x482)
@@ -1019,7 +1019,7 @@ const Bit32u VMX_MSR_VMX_PROCBASED_CTRLS_LO = 0x0401E172;
        (VMX_VM_EXEC_CTRL2_SUPPORTED_BITS | VMX_MSR_VMX_PROCBASED_CTRLS_LO)
 
 #define VMX_MSR_VMX_PROCBASED_CTRLS \
-   ((((Bit64u) VMX_MSR_VMX_PROCBASED_CTRLS_HI) << 32) | VMX_MSR_VMX_PROCBASED_CTRLS_LO)
+   GET64_FROM_HI32_LO32(VMX_MSR_VMX_PROCBASED_CTRLS_HI, VMX_MSR_VMX_PROCBASED_CTRLS_LO)
 
 // IA32_MSR_VMX_TRUE_PROCBASED_CTRLS MSR (0x48e)
 // ---------------------------------
@@ -1029,7 +1029,7 @@ const Bit32u VMX_MSR_VMX_PROCBASED_CTRLS_LO = 0x0401E172;
 #define VMX_MSR_VMX_TRUE_PROCBASED_CTRLS_HI (VMX_MSR_VMX_PROCBASED_CTRLS_HI)
 
 #define VMX_MSR_VMX_TRUE_PROCBASED_CTRLS \
-   ((((Bit64u) VMX_MSR_VMX_TRUE_PROCBASED_CTRLS_HI) << 32) | VMX_MSR_VMX_TRUE_PROCBASED_CTRLS_LO)
+   GET64_FROM_HI32_LO32(VMX_MSR_VMX_TRUE_PROCBASED_CTRLS_HI, VMX_MSR_VMX_TRUE_PROCBASED_CTRLS_LO)
 
 
 // IA32_MSR_VMX_VMEXIT_CTRLS MSR (0x483)
@@ -1044,7 +1044,7 @@ const Bit32u VMX_MSR_VMX_VMEXIT_CTRLS_LO = 0x00036DFF;
        (VMX_VMEXIT_CTRL1_SUPPORTED_BITS | VMX_MSR_VMX_VMEXIT_CTRLS_LO)
 
 #define VMX_MSR_VMX_VMEXIT_CTRLS \
-   ((((Bit64u) VMX_MSR_VMX_VMEXIT_CTRLS_HI) << 32) | VMX_MSR_VMX_VMEXIT_CTRLS_LO)
+   GET64_FROM_HI32_LO32(VMX_MSR_VMX_VMEXIT_CTRLS_HI, VMX_MSR_VMX_VMEXIT_CTRLS_LO)
 
 // IA32_MSR_VMX_TRUE_VMEXIT_CTRLS MSR (0x48f)
 // ------------------------------
@@ -1054,7 +1054,7 @@ const Bit32u VMX_MSR_VMX_VMEXIT_CTRLS_LO = 0x00036DFF;
 #define VMX_MSR_VMX_TRUE_VMEXIT_CTRLS_HI (VMX_MSR_VMX_VMEXIT_CTRLS_HI)
 
 #define VMX_MSR_VMX_TRUE_VMEXIT_CTRLS \
-   ((((Bit64u) VMX_MSR_VMX_TRUE_VMEXIT_CTRLS_HI) << 32) | VMX_MSR_VMX_TRUE_VMEXIT_CTRLS_LO)
+   GET64_FROM_HI32_LO32(VMX_MSR_VMX_TRUE_VMEXIT_CTRLS_HI, VMX_MSR_VMX_TRUE_VMEXIT_CTRLS_LO)
 
 
 // IA32_MSR_VMX_VMENTRY_CTRLS MSR (0x484)
@@ -1069,7 +1069,7 @@ const Bit32u VMX_MSR_VMX_VMENTRY_CTRLS_LO = 0x000011FF;
        (VMX_VMENTRY_CTRL1_SUPPORTED_BITS | VMX_MSR_VMX_VMENTRY_CTRLS_LO)
 
 #define VMX_MSR_VMX_VMENTRY_CTRLS \
-   ((((Bit64u) VMX_MSR_VMX_VMENTRY_CTRLS_HI) << 32) | VMX_MSR_VMX_VMENTRY_CTRLS_LO)
+   GET64_FROM_HI32_LO32(VMX_MSR_VMX_VMENTRY_CTRLS_HI, VMX_MSR_VMX_VMENTRY_CTRLS_LO)
 
 // IA32_MSR_VMX_TRUE_VMENTRY_CTRLS MSR (0x490)
 // -------------------------------
@@ -1079,7 +1079,7 @@ const Bit32u VMX_MSR_VMX_VMENTRY_CTRLS_LO = 0x000011FF;
 #define VMX_MSR_VMX_TRUE_VMENTRY_CTRLS_HI (VMX_MSR_VMX_VMENTRY_CTRLS_HI)
 
 #define VMX_MSR_VMX_TRUE_VMENTRY_CTRLS \
-   ((((Bit64u) VMX_MSR_VMX_TRUE_VMENTRY_CTRLS_HI) << 32) | VMX_MSR_VMX_TRUE_VMENTRY_CTRLS_LO)
+   GET64_FROM_HI32_LO32(VMX_MSR_VMX_TRUE_VMENTRY_CTRLS_HI, VMX_MSR_VMX_TRUE_VMENTRY_CTRLS_LO)
 
 
 // IA32_MSR_VMX_MISC MSR (0x485)
@@ -1135,14 +1135,14 @@ const Bit32u VMX_MSR_CR0_FIXED0_LO = 0x80000021;
 const Bit32u VMX_MSR_CR0_FIXED0_HI = 0x00000000;
 
 const Bit64u VMX_MSR_CR0_FIXED0 =
-   ((((Bit64u) VMX_MSR_CR0_FIXED0_HI) << 32) | VMX_MSR_CR0_FIXED0_LO);
+   GET64_FROM_HI32_LO32(VMX_MSR_CR0_FIXED0_HI, VMX_MSR_CR0_FIXED0_LO);
 
 // allowed 1-setting in CR0 in VMX mode
 const Bit32u VMX_MSR_CR0_FIXED1_LO = 0xFFFFFFFF;
 const Bit32u VMX_MSR_CR0_FIXED1_HI = 0x00000000;
 
 const Bit64u VMX_MSR_CR0_FIXED1 =
-   ((((Bit64u) VMX_MSR_CR0_FIXED1_HI) << 32) | VMX_MSR_CR0_FIXED1_LO);
+   GET64_FROM_HI32_LO32(VMX_MSR_CR0_FIXED1_HI, VMX_MSR_CR0_FIXED1_LO);
 
 //
 // IA32_VMX_CR4_FIXED0 MSR (0x488)   IA32_VMX_CR4_FIXED1 MSR (0x489)
@@ -1154,14 +1154,14 @@ const Bit32u VMX_MSR_CR4_FIXED0_LO = 0x00002000;
 const Bit32u VMX_MSR_CR4_FIXED0_HI = 0x00000000;
 
 const Bit64u VMX_MSR_CR4_FIXED0 =
-   ((((Bit64u) VMX_MSR_CR4_FIXED0_HI) << 32) | VMX_MSR_CR4_FIXED0_LO);
+   GET64_FROM_HI32_LO32(VMX_MSR_CR4_FIXED0_HI, VMX_MSR_CR4_FIXED0_LO);
 
 // allowed 1-setting in CR0 in VMX mode
 #define VMX_MSR_CR4_FIXED1_LO (BX_CPU_THIS_PTR cr4_suppmask)
 #define VMX_MSR_CR4_FIXED1_HI (0)
 
 #define VMX_MSR_CR4_FIXED1 \
-   ((((Bit64u) VMX_MSR_CR4_FIXED1_HI) << 32) | VMX_MSR_CR4_FIXED1_LO)
+   GET64_FROM_HI32_LO32(VMX_MSR_CR4_FIXED1_HI, VMX_MSR_CR4_FIXED1_LO)
 
 
 //
@@ -1177,7 +1177,7 @@ const Bit32u VMX_MSR_VMCS_ENUM_LO = VMX_HIGHEST_VMCS_ENCODING;
 const Bit32u VMX_MSR_VMCS_ENUM_HI = 0x00000000;
 
 const Bit64u VMX_MSR_VMCS_ENUM =
-   ((((Bit64u) VMX_MSR_VMCS_ENUM_HI) << 32) | VMX_MSR_VMCS_ENUM_LO);
+   GET64_FROM_HI32_LO32(VMX_MSR_VMCS_ENUM_HI, VMX_MSR_VMCS_ENUM_LO);
 
 
 // IA32_VMX_MSR_PROCBASED_CTRLS2 MSR (0x48b)
@@ -1190,7 +1190,7 @@ const Bit32u VMX_MSR_VMX_PROCBASED_CTRLS2_LO = 0x00000000;
        (VMX_VM_EXEC_CTRL3_SUPPORTED_BITS | VMX_MSR_VMX_PROCBASED_CTRLS2_LO)
 
 #define VMX_MSR_VMX_PROCBASED_CTRLS2 \
-   ((((Bit64u) VMX_MSR_VMX_PROCBASED_CTRLS2_HI) << 32) | VMX_MSR_VMX_PROCBASED_CTRLS2_LO)
+   GET64_FROM_HI32_LO32(VMX_MSR_VMX_PROCBASED_CTRLS2_HI, VMX_MSR_VMX_PROCBASED_CTRLS2_LO)
 
 #if BX_SUPPORT_VMX >= 2
 

bochs/cpu/xsave.cc

@@ -147,7 +147,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::XSAVEC(bxInstruction_c *i)
       }
 
       VMCS_CACHE *vm = &BX_CPU_THIS_PTR vmcs;
-      Bit64u requested_features = (((Bit64u) EDX) << 32) | EAX;
+      Bit64u requested_features = GET64_FROM_HI32_LO32(EDX, EAX);
       if (requested_features & BX_CPU_THIS_PTR msr.ia32_xss & vm->xss_exiting_bitmap)
         VMexit_Instruction(i, VMX_VMEXIT_XSAVES);
     }
@@ -250,7 +250,7 @@ void BX_CPP_AttrRegparmN(1) BX_CPU_C::XRSTOR(bxInstruction_c *i)
       }
 
       VMCS_CACHE *vm = &BX_CPU_THIS_PTR vmcs;
-      Bit64u requested_features = (((Bit64u) EDX) << 32) | EAX;
+      Bit64u requested_features = GET64_FROM_HI32_LO32(EDX, EAX);
       if (requested_features & BX_CPU_THIS_PTR msr.ia32_xss & vm->xss_exiting_bitmap)
         VMexit_Instruction(i, VMX_VMEXIT_XRSTORS);
     }