Skip to content
This repository has been archived by the owner on Jun 21, 2022. It is now read-only.

Dev md #21

Open
wants to merge 7 commits into
base: main
Choose a base branch
from
+201 −146
Open

Dev md #21

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
7 commits
Select commit Hold shift + click to select a range
6589803
更新文档
eovoe Dec 31, 2020
124b89f
修正一点细节
eovoe Dec 31, 2020
dcfce6d
修正了一些文档问题
eovoe Jan 1, 2021
8f14555
”“
eovoe Jan 1, 2021
4d47014
修正了一些问题
eovoe Jan 1, 2021
a299810
修正了mmu.md
eovoe Jan 1, 2021
2b2fe93
修正文档
eovoe Jan 3, 2021
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
22 changes: 12 additions & 10 deletions doc/mips/cp0.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2,15 +2,17 @@
| --------- | ------ | ---- | ------ | ---------------------------------- |
| clk | | 输入 | 1 | 时钟信号 |
| rst | | 输入 | 1 | 重置信号 |
| cp0_en | MM.D.2 | 输入 | 1 | CP0寄存器写使能 |
| cp0_bd | MM.D.2 | 输入 | 1 | CP0寄存器写数据：CP0.Cause.BD |
| cp0_exl | MM.D.2 | 输入 | 1 | CP0寄存器写数据：CP0.Status.EXL |
| cp0_exc | MM.D.2 | 输入 | W_EXCC | CP0寄存器写数据：CP0.Cause.ExcCode |
| cp0_epc | MM.D.2 | 输入 | W_ADDR | CP0寄存器写数据：CP0.EPC |
| cp0_bva | MM.D.2 | 输入 | W_ADDR | CP0寄存器写数据：CP0.BadVAddr |
| regf_w | ID.I.2 | 输入 | W_REGF | 写的寄存器号 |
| regf_r | ID.I.2 | 输入 | W_REGF | 读的寄存器号 |
| data_w | EX.D.3 | 输入 | W_DATA | 要写入CP0寄存器的通用寄存器的数据 |
| data_r | EX.D.4 | 输出 | W_DATA | 要写入通用寄存器的CP0寄存器数据 |
| rt.regf | ID.I.2 | 输入 | W_REGF | 读的寄存器号 |
| rt.data | EX.D.4 | 输出 | W_DATA | 要写入通用寄存器的CP0寄存器数据 |
| rd.regf | ID.I.2 | 输入 | W_REGF | 写的寄存器号 |
| rd.data | EX.D.3 | 输入 | W_DATA | 要写入CP0寄存器的通用寄存器的数据 |
| cp0w.we | MM.D.2 | 输入 | 1 | CP0寄存器写使能 |
| cp0w.bd | MM.D.2 | 输入 | 1 | CP0寄存器写数据：CP0.Cause.BD |
| cp0w.exl | MM.D.2 | 输入 | 1 | CP0寄存器写数据：CP0.Status.EXL |
| cp0w.exc | MM.D.2 | 输入 | W_EXCC | CP0寄存器写数据：CP0.Cause.ExcCode |
| cp0w.epc | MM.D.2 | 输入 | W_ADDR | CP0寄存器写数据：CP0.EPC |
| cp0w.bva | MM.D.2 | 输入 | W_ADDR | CP0寄存器写数据：CP0.BadVAddr |
| hard_intr | | 输入 | W_HINT | 硬件终端 |
| intr_vect | ID.E.3 | 输出 | W_INTV | 中断向量 |
| er_epc | | 输出 | W_ADDR | |

2 changes: 1 addition & 1 deletion doc/mips/datapath/control.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
| ex_mm_stall | | 输出 | 1 | EX-MM寄存器停顿信号 |
| ex_mm_flush | | 输出 | 1 | EX-MM寄存器刷新信号 |
| mm_wb_stall | | 输出 | 1 | MM-WB寄存器停顿信号 |
| mm_wb_stall | | 输出 | 1 | MM-WB寄存器刷新信号 |
| mm_wb_flush | | 输出 | 1 | MM-WB寄存器刷新信号 |
| pc_stall | IF.C.1 | 输出 | 1 | PC寄存器的停顿信号 |
| pc_flush | IF.C.1 | 输出 | 1 | PC寄存器的刷新信号 |

74 changes: 45 additions & 29 deletions doc/mips/datapath/datapath.md
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,32 +1,48 @@
| 信号 | 线号 | 方向 | 位宽 | 描述 |
| ---------------- | :----: | :--: | :----: | ---------------------------------- |
| ibus_en | IF.A.1 | 输出 | 1 | 指令地址读使能 |
| ibus_addr | IF.A.1 | 输出 | W_ADDR | 指令地址 |
| ibus_inst | ID.I.1 | 输入 | W_DATA | 指令 |
| ibus_except_adel | ID.E.1 | 输入 | 1 | 指令总线取数据异常 |
| ibus_except_addr | ID.E.1 | 输入 | W_ADDR | 指令总线取数据异常的虚地址 |
| clk | | 输入 | 1 | 时钟信号 |
| rst | | 输入 | 1 | 重置信号 |
| intr_vect | ID.E.2 | 输入 | W_INTV | 中断向量 |
| cp0_rt_regf | ID.I.2 | 输入 | W_REGF | 要读取的CP0寄存器号 |
| cp0_rt_data | EX.D.4 | 输入 | W_DATA | 要读取的CP0寄存器值 |
| cp0_rd_regf | ID.I.2 | 输入 | W_REGF | 要写入的CP0寄存器号，无则为零 |
| cp0_rd_data | EX.D.3 | 输出 | W_DATA | 要写入的CP0寄存器值 |
| cp0_we | MM.D.2 | 输出 | 1 | CP0寄存器写使能 |
| cp0_bd | MM.D.2 | 输出 | 1 | CP0寄存器写数据：CP0.Cause.BD |
| cp0_exl | MM.D.2 | 输出 | 1 | CP0寄存器写数据：CP0.Status.EXL |
| cp0_exc | MM.D.2 | 输出 | W_EXCC | CP0寄存器写数据：CP0.Cause.ExcCode |
| cp0_epc | MM.D.2 | 输出 | W_ADDR | CP0寄存器写数据：CP0.EPC |
| cp0_bva | MM.D.2 | 输出 | W_ADDR | CP0寄存器写数据：CP0.BadVAddr |
| dbus_en | MM.A.1 | 输出 | 1 | 访存使能 |
| dbus_we | MM.A.1 | 输出 | 4 | 访存读写控制信号 |
| dbus_addr | MM.A.1 | 输出 | W_ADDR | 访存地址 |
| dbus_data_w | MM.D.1 | 输出 | W_ADDR | 访存数据（写） |
| dbus_data_r | WB.D.1 | 输入 | W_DATA | 访存数据（读） |
| dbus_except_adel | MM.E.1 | 输入 | 1 | 数据总线取数据异常 |
| dbus_except_ades | MM.E.1 | 输入 | 1 | 数据总线写数据异常 |
| dbus_except_addr | MM.E.1 | 输入 | W_ADDR | 数据总线读写数据异常的虚地址 |
| rs_regf | ID.I.2 | 输出 | W_REGF | 第一个源寄存器号 |
| rt_regf | ID.I.2 | 输出 | W_REGF | 第二个源寄存器号 |
| rd_regf | ID.I.2 | 输出 | W_REGF | 目标寄存器号，无则为零 |
| rs_data | ID.D.4 | 输入 | W_DATA | 第一个源寄存器值 |
| rt_data | ID.D.4 | 输入 | W_DATA | 第二个源寄存器值 |
| rd_data | WB.D.2 | 输出 | W_DATA | 目标寄存器值 |
| er_epc | | 输入 | W_ADDR | |
|ibus_sbus.en | | 输出|1 | |
| ibus_sbus.we | | 输出 | 4 | |
| ibus_sbus.size | | 输出 | 2 | |
| ibus_sbus.addr | | 输出 | W_ADDR | |
| ibus_sbus.data_w | | 输出 | W_DATA | |
| ibus_sbus.data_r | | 输入 | W_DATA | |
| ibus_sbus.stall | | 输入 | 1 | |
|dbus_sbus.en | | 输出|1 | |
| dbus_sbus.we | | 输出 | 4 | |
| dbus_sbus.size | | 输出 | 2 | |
| dbus_sbus.addr | | 输出 | W_ADDR | |
| dbus_sbus.data_w | | 输出 | W_DATA | |
| dbus_sbus.data_r | | 输入 | W_DATA | |
| dbus_sbus.stall | | 输入 | 1 | |
| ibus_update | | 输出 | 1 | |
| dbus_update | | 输出 | 1 | |
| ibus_error.adel | | 输入 | 1 | ibus中load指令是否触发地址错例外 |
| ibus_error.ades | | 输入 | 1 | ibus中store指令是否触发地址错例外 |
| ibus_error.addr | | 输入 | W_ADDR | ibus中地址错例外的地址 |
| dbus_error.adel | | 输入 | 1 | dbus中load指令是否触发地址错例外 |
| dbus_error.ades | | 输入 | 1 | dbus中store指令是否触发地址错例外 |
| dbus_error.addr | | 输入 | W_ADDR | dbus中地址错例外的地址 |
| cp0w_error.we | MM.D.2 | 输出 | 1 | CP0寄存器写使能 |
| cp0w_error.bd | MM.D.2 | 输出 | 1 | CP0寄存器写数据：CP0.Cause.BD |
| cp0w_error.exl | MM.D.2 | 输出 | 1 | CP0寄存器写数据：CP0.Status.EXL |
| cp0w_errorexc | MM.D.2 | 输出 | W_EXCC | CP0寄存器写数据：CP0.Cause.ExcCode |
| cp0w_error.epc | MM.D.2 | 输出 | W_ADDR | CP0寄存器写数据：CP0.EPC |
| cp0w_error.bva | MM.D.2 | 输出 | W_ADDR | CP0寄存器写数据：CP0.BadVAddr |
| cp0_rt.regf | | 输出 | W_REGF | |
| cp0_rt.data | | 输入 | W_DATA | |
| cp0_rd.regf | | 输出 | W_REGF | |
| cp0_rd.data | | 输出 | W_DATA | |
| rs.regf | | 输出 | W_REGF | |
| rs.data | | 输入 | W_DATA | |
| rt.regf | | 输出 | W_REGF | |
| rt.data | | 输入 | W_DATA | |
| rd.regf | | 输出 | W_REGF | |
| rd.data | | 输出 | W_DATA | |
| debug.debug_wb_pc | | 输出 | W_DATA | |
| debug.debug_wb_rf_wen | | 输出 | 4 | |
| debug.debug_wb_rf_wnum | | 输出 | W_REGF | |
| debug.debug_wb_rf_wdata | | 输出 | W_DATA | |
5 changes: 2 additions & 3 deletions doc/mips/datapath/ex/alusrc.md
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,7 +1,6 @@
| 信号名称 | 线号 | 方向 | 位宽 | 描述 |
| --------------- | :----: | :--: | :----: | -------------------------- |
| type | ID.I.2 | 输入 | W_TYPE | 指令类型 |
| oper | ID.I.2 | 输入 | W_OPER | 操作数 |
| ityp | ID.I.2 | 输入 | W_TYPE | 指令类型 |
| func | ID.I.2 | 输入 | W_FUNC | func类型 |
| imme | ID.D.1 | 输入 | W_DATA | 扩展之后的立即数 |
| forward_rs | EX.D.1 | 输入 | 1 | 第一个源寄存器前推的有效性 |
Expand All @@ -12,4 +11,4 @@
| rt_data | ID.D.4 | 输入 | W_DATA | 第二个源寄存器值 |
| source_a | EX.D.2 | 输出 | W_DATA | 第一个运算器操作数 |
| source_b | EX.D.2 | 输出 | W_DATA | 第二个运算器操作数 |

| source_data | EX.D.2 | 输出 | W_DATA | 控制访存 |
6 changes: 4 additions & 2 deletions doc/mips/datapath/ex/ex.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -3,8 +3,9 @@
| clk | | ���� | 1 | ʱ�� |
| rst | | ���� | 1 | ��λ |
| reg_stall | | ���� | 1 | ID-EX��Ĵ���ͣ���ź� |
| reg_flush | | ���� | 1 | ID-EX��Ĵ���ˢ���ź� |
| alu_stall | EX.C.1 | ��� | 1 | ������������ͣ������ |
| type | ID.I.2 | ���� | W_TYPE | ָ������ |
| ityp | ID.I.2 | ���� | W_TYPE | ָ������ |
| oper | ID.I.2 | ���� | W_OPER | ������ |
| func | ID.I.2 | ���� | W_FUNC | ������ |
| imme | ID.D.1 | ���� | W_DATA | ��չ֮��������� |
Expand All @@ -17,4 +18,5 @@
| cp0_rt_data | EX.D.4 | ���� | W_DATA | Ҫ��ȡ��CP0�Ĵ���ֵ |
| cp0_rd_data | EX.D.3 | ��� | W_DATA | Ҫд���CP0�Ĵ���ֵ |
| result | EX.D.5 | ��� | W_DATA | ������ |
| ov | EX.E.1 | ��� | 1 | ����������쳣 |
| ov | EX.E.1 | ��� | 1 | ����������쳣 |
| source_data | | ��� | W_DATA | ���Ʒô� |
7 changes: 3 additions & 4 deletions doc/mips/datapath/ex/mulalu.md
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,7 +1,8 @@
| �ź����� | �ߺ� | ���� | λ�� | ���� |
| ------------- | :----: | :--: | :----: | --------------------- |
| clk | | ���� | 1 | ʱ�� |
| rst | | ���� | 1 | ��λ |
| clk | | ���� | 1 | ʱ���ź� |
| rst | | ���� | 1 | ��λ�ź� |
| reg_flush | | ���� | 1 | ID-EX��Ĵ���ˢ���ź� |
| reg_stall | | ���� | 1 | ID-EX��Ĵ���ͣ���ź� |
| alu_stall | EX.C.1 | ��� | 1 | ͣ������ |
| sign | | ���� | 1 | �Ƿ�Ϊ�з������� |
Expand All @@ -14,5 +15,3 @@
| lo | | ��� | W_DATA | LO�Ĵ�����ǰֵ |
| lo_write | | ���� | 1 | дLO�Ĵ���ʹ�� |
| lo_write_data | | ���� | W_DATA | дLO�Ĵ������� |


35 changes: 16 additions & 19 deletions doc/mips/datapath/ex/sglalu.md
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,19 +1,16 @@
| 信号名称 | 线号 | 方向 | 位宽 | 描述 |
| ------------- | :----: | :--: | :----: | -------------------------------- |
| oper | ID.I.2 | 输入 | W_OPER | 操作码 |
| func | ID.I.2 | 输入 | W_FUNC | 运算码 |
| cp0_rt_data | EX.D.4 | 输入 | W_DATA | 要读取的CP0寄存器值 |
| cp0_rd_data | EX.D.3 | 输出 | W_DATA | 要写入的CP0寄存器值 |
| source_a | EX.D.2 | 输入 | W_DATA | 第一个操作数 |
| source_b | EX.D.2 | 输入 | W_DATA | 第二个操作数 |
| result | EX.D.5 | 输出 | W_DATA | 运算结果 |
| mulalu_sign | | 输出 | 1 | 输出到多周期的，是否为有符号运算 |
| mulalu_func | | 输出 | W_FUNC | 输出到多周期的运算码 |
| hi | | 输入 | W_DATA | HI寄存器当前值 |
| hi_write | | 输出 | 1 | 写HI寄存器使能 |
| hi_write_data | | 输入 | W_DATA | 写HI寄存器数据 |
| lo | | 输入 | W_DATA | LO寄存器当前值 |
| lo_write | | 输出 | 1 | 写LO寄存器使能 |
| lo_write_data | | 输入 | W_DATA | 写LO寄存器数据 |
| ov | EX.E.1 | 输出 | 1 | 运算器溢出异常 |

| 信号名称 | 线号 | 方向 | 位宽 | 描述 |
| ----------- | :----: | :--: | :----: | -------------------------------- |
| oper | ID.I.2 | 输入 | W_OPER | 操作码 |
| func | ID.I.2 | 输入 | W_FUNC | 运算码 |
| cp0_rt_data | EX.D.4 | 输入 | W_DATA | 要读取的CP0寄存器值 |
| cp0_rd_data | EX.D.3 | 输出 | W_DATA | 要写入的CP0寄存器值 |
| source_a | EX.D.2 | 输入 | W_DATA | 第一个操作数 |
| source_b | EX.D.2 | 输入 | W_DATA | 第二个操作数 |
| result | EX.D.5 | 输出 | W_DATA | 运算结果 |
| mulalu_sign | | 输出 | 1 | 输出到多周期的，是否为有符号运算 |
| mulalu_func | | 输出 | W_FUNC | 输出到多周期的运算码 |
| hi | | 输入 | W_DATA | HI寄存器当前值 |
| hi_write | | 输出 | 1 | 写HI寄存器使能 |
| lo | | 输入 | W_DATA | LO寄存器当前值 |
| lo_write | | 输出 | 1 | 写LO寄存器使能 |
| ov | EX.E.1 | 输出 | 1 | 运算器溢出异常 |
1 change: 0 additions & 1 deletion doc/mips/datapath/forward.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,6 @@
| ------------------ | :----: | :--: | :----: | ---------------------------------------- |
| oper_id | ID.I.2 | 输入 | W_OPER | ID阶段的操作码 |
| oper_ex | ID.I.2 | 输入 | W_OPER | EX阶段的操作码 |
| oper_mm | ID.I.2 | 输入 | W_OPER | MM阶段的操作码 |
| from_ex_regf | EX.D.5 | 输入 | W_REGF | 来自EX阶段，目标寄存器号 |
| from_ex_data | EX.D.5 | 输入 | W_DATA | 来自EX阶段，目标 |
| from_mm_regf | MM.D.1 | 输入 | W_REGF | 来自MM阶段，目标寄存器号 |
Expand Down
2 changes: 1 addition & 1 deletion doc/mips/datapath/id/brcsrc.md
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,8 +1,8 @@
| 信号 | 线号 | 方向 | 位宽 | 描述 |
| --------------- | ------ | ---- | ------ | -------------------------- |
| forward_rs | ID.D.3 | 输入 | 1 | 第一个源寄存器前推的有效性 |
| forward_rs_data | ID.D.3 | 输入 | W_DATA | 第一个源寄存器前推的值 |
| forward_rt | ID.D.3 | 输入 | 1 | 第二个源寄存器前推的有效性 |
| forward_rs_data | ID.D.3 | 输入 | W_DATA | 第一个源寄存器前推的值 |
| forward_rt_data | ID.D.3 | 输入 | W_DATA | 第二个源寄存器前推的值 |
| rs_data | ID.D.4 | 输入 | W_DATA | 第一个源寄存器值 |
| rt_data | ID.D.4 | 输入 | W_DATA | 第二个源寄存器值 |
Expand Down
3 changes: 1 addition & 2 deletions doc/mips/datapath/id/decode.md
View file
Open in desktop
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
| �ź����� | �ߺ� | ���� | λ�� | ���� |
| -------- | :----: | :--: | :----: | --------------------- |
| inst | ID.I.1 | ���� | W_DATA | ָ�� |
| type | ID.I.2 | ��� | W_TYPE | ָ�����ͣ�R��I��J�� |
| ityp | ID.I.2 | ��� | W_TYPE | ָ�����ͣ�R��I��J�� |
| oper | ID.I.2 | ��� | W_OPER | ������ |
| func | ID.I.2 | ��� | W_FUNC | ������ |
| imme | ID.D.1 | ��� | W_DATA | ��չ֮��������� |
Expand All @@ -12,4 +12,3 @@
| bp | ID.E.2 | ��� | 1 | ����ָ���쳣��BREAK |
| ri | ID.E.2 | ��� | 1 | δʵ��ָ���쳣 |
| er | ID.E.2 | ��� | 1 | ����ָ���쳣��ERET |

15 changes: 7 additions & 8 deletions doc/mips/datapath/id/id.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -2,23 +2,22 @@
| --------------- | ------ | ---- | ------ | -------------------------- |
| pc | IF.A.1 | 输入 | W_DATA | 指令地址 |
| inst | ID.I.1 | 输入 | W_DATA | 指令 |
| type | ID.I.2 | 输出 | W_TYPE | 指令类型（R，I，J） |
| oper | ID.I.2 | 输出 | W_OPER | 操作码 |
| func | ID.I.2 | 输出 | W_FUNC | 运算码 |
| imme | ID.D.1 | 输出 | W_DATA | 扩展之后的立即数 |
| rs_regf | ID.I.2 | 输出 | W_REGF | 第一个源寄存器号 |
| rt_regf | ID.I.2 | 输出 | W_REGF | 第二个源寄存器号 |
| rd_regf | ID.I.2 | 输出 | W_REGF | 目标寄存器号 |
| rs_data | ID.D.4 | 输入 | W_DATA | 第一个源寄存器值 |
| rt_data | ID.D.4 | 输入 | W_DATA | 第二个源寄存器值 |
| forward_rs | ID.D.3 | 输入 | 1 | 第一个源寄存器前推的有效性 |
| forward_rs_data | ID.D.3 | 输入 | W_DATA | 第一个源寄存器前推的值 |
| forward_rt | ID.D.3 | 输入 | 1 | 第二个源寄存器前推的有效性 |
| forward_rt_data | ID.D.3 | 输入 | W_DATA | 第二个源寄存器前推的值 |
| ityp | ID.I.2 | 输出 | W_TYPE | 指令类型（R，I，J） |
| oper | ID.I.2 | 输出 | W_OPER | 操作码 |
| func | ID.I.2 | 输出 | W_FUNC | 运算码 |
| imme | ID.D.1 | 输出 | W_DATA | 扩展之后的立即数 |
| rs_regf | ID.I.2 | 输出 | W_REGF | 第一个源寄存器号 |
| rt_regf | ID.I.2 | 输出 | W_REGF | 第二个源寄存器号 |
| rd_regf | ID.I.2 | 输出 | W_REGF | 目标寄存器号 |
| branch | ID.A.1 | 输出 | 1 | 分支跳转目标地址的有效性 |
| branch_addr | ID.A.1 | 输出 | W_ADDR | 分支跳转目标地址 |
| sy | ID.E.2 | 输出 | 1 | 内陷指令异常：SYSCALL |
| bp | ID.E.2 | 输出 | 1 | 内陷指令异常：BREAK |
| ri | ID.E.2 | 输出 | 1 | 未实现指令异常 |
| er | ID.E.2 | 输出 | 1 | 内陷指令异常：ERET |

1 change: 0 additions & 1 deletion doc/mips/datapath/if/if.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -8,4 +8,3 @@
| branch | ID.A.1 | 输入 | 1 | 分支跳转目标地址的有效性 |
| branch_addr | ID.A.1 | 输入 | W_ADDR | 分支跳转目标地址 |
| pc | IF.A.1 | 输出 | 1 | 指令地址读使能 |
| pc_addr | IF.A.1 | 输出 | W_ADDR | 指令地址 |
1 change: 0 additions & 1 deletion doc/mips/datapath/if/pc.md
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,5 @@
| branch | ID.A.1 | ���� | 1 | ��֧��תĿ���ַ����Ч�� |
| branch_addr | ID.A.1 | ���� | W_ADDR | ��֧��תĿ���ַ |
| pc | IF.A.1 | ��� | 1 | ָ���ַ��ʹ�� |
| pc_addr | IF.A.1 | ��� | W_ADDR | ָ���ַ |


Loading