Refactor/riscv #1
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- Add a `resize_memory_object` with dubious safety checks - Expose this syscall via userspace `poplar` library - Rework `std` heap support to make it closer to real-`std` - This fixes current versions of `ginkgo`'s GC which makes raw allocations
It will allow sharing Cargo `target` compile cache and allow workspace scope rust analyzer checks. Signed-off-by: Zhouqi Jiang <[email protected]>
- xtask: rename opensbi to bios, reflecting broader firmware support (including SBI-based and non-SBI variants) for QEMU
- hal_riscv: rename OPENSBI_ADDR to M_FIRMWARE_ADDR, aligning with firmware-agnostic terminology
- book: clarify SBI’s role on RISC-V, noting it interfaces with M-mode firmware and provides kernel runtime/security mechanisms (e.g., isolation, access control)
Changes focus on clarity, consistency ("firmware-agnostic"), and explicit technical scope.
Signed-off-by: Zhouqi Jiang <[email protected]>
Signed-off-by: Zhouqi Jiang <[email protected]>
Ref: https://gitlab.redox-os.org/redox-os/kernel/-/merge_requests/365 Signed-off-by: Zhouqi Jiang <[email protected]>
Ref: IsaacWoods#108 Signed-off-by: Zhouqi Jiang <[email protected]>
…alloc` crate Signed-off-by: Zhouqi Jiang <[email protected]>
Signed-off-by: Junxing Zhu <[email protected]>
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