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RhinoChip controller for Rhino educational robots | ||
Copyright (C) 2013-2014 Jonan Cruz-Martin, realized as a master thesis | ||
at the University of Las Palmas de Gran Canaria | ||
<www.ulpgc.es> under supervision of Pedro Medina | ||
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This program is free software: you can redistribute it and/or modify | ||
it under the terms of the GNU General Public License as published by | ||
the Free Software Foundation, either version 3 of the License, or | ||
(at your option) any later version. | ||
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This program is distributed in the hope that it will be useful, | ||
but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
GNU General Public License for more details. | ||
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You should have received a copy of the GNU General Public License | ||
along with this program. If not, see <http://www.gnu.org/licenses/>. |
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# RhinoChip OS | ||
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RhinoChip OS is the firmware of the RhinoChip Controller for Educational Robotics. The RhinoChip platform provides a controller for the educational robots Rhino XR-4 and Rhino SCARA which is intended to replace the Rhino Mark IV controller. RhinoChip OS is the software that powers the RhinoChip platform. | ||
RhinoChip OS is the firmware of the RhinoChip Controller for Educational Robotics. | ||
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RhinoChip OS consists of two programs: the general purpose core (`gpcore`) and the motor control program (`motorctl`). The `gpcore` is the program that runs on the dsPIC30F4013 General Purpose Microcontroller and communicates with the host PC. `motorctl` is the program that runs on the dsPIC30F4011 Motor Control Microcontroller and drives the motors of the robotic arm. | ||
The RhinoChip platform provides a controller for the educational robots Rhino XR-4 and Rhino SCARA and is intended to replace the Rhino Mark IV controller. RhinoChip OS is the software that powers the RhinoChip platform. | ||
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RhinoChip OS consists of two programs: the *general purpose core* (`gpcore`) and the *motor control program* (`motorctl`). | ||
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The `gpcore` is the program that runs on the *General Purpose Microcontroller Unit* (GPMCU) and communicates with the host PC over the RS-232C protocol in order to interpret the commands sent from the host PC and coordinate the actions and movements indicated by those commands, which are excecuted by `motorctl`. | ||
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`motorctl` is the program that runs on the *Motor Control Microcontroller* (MCMCU) and drives the motors of the robotic arm, executing the movement commands indicated by the `gpcore`. |
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#ifndef CLOCK_H | ||
#define CLOCK_H | ||
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#include <p30fxxxx.h> | ||
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/* | ||
* Using the on-board crystal oscillator with a PLL multiplier setting of 16x, | ||
* an overall instruction cycle frequency of about 29.50 MHz can be achieved. | ||
*/ | ||
#define FOSC 7372800 /* On-board crystal frequency (7.3728 MHz) */ | ||
#define PLLMODE 16 /* On-chip PLL setting */ | ||
#define FCY (FOSC * PLLMODE / 4) /* Instruction cycle frequency */ | ||
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#endif // CLOCK_H |
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#include "buffer.h" | ||
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#include <stdlib.h> | ||
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void buffer_init(buffer_t *buf) | ||
{ | ||
if (buf != NULL) | ||
{ | ||
buf->size = BUFFER_SIZE; | ||
buf->used = 0; | ||
} | ||
} |
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#ifndef BUFFER_H | ||
#define BUFFER_H | ||
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#include "../types.h" | ||
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#define BUFFER_SIZE 64 | ||
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/** | ||
* Type definition for a linear buffer. | ||
*/ | ||
typedef struct { | ||
char data[BUFFER_SIZE]; | ||
int size; | ||
int used; | ||
} buffer_t; | ||
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/** | ||
* Initialize the given buffer for being used. Currently, this only consists in | ||
* setting the buffer's 'size' and 'used' fields to 'BUFFER_SIZE' and zero, | ||
* respectively. | ||
*/ | ||
void buffer_init(buffer_t *buf); | ||
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#endif |
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#ifndef STACK_H | ||
#define STACK_H | ||
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#define STACK_SIZE 24 | ||
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typedef struct{ | ||
char data[STACK_SIZE]; | ||
int used; | ||
} stack_t; | ||
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#endif |
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#include "debug.h" | ||
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#ifndef NDEBUG | ||
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#include <p30fxxxx.h> | ||
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void dbgmsg_uart1(char *c) | ||
{ | ||
for (; *c != 0; ++c) | ||
{ | ||
while (U1STAbits.UTXBF); | ||
U1TXREG = *c; | ||
} | ||
} | ||
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void dbgmsg_uart2(char *c) | ||
{ | ||
for (; *c != 0; ++c) | ||
{ | ||
while (U2STAbits.UTXBF); | ||
U2TXREG = *c; | ||
} | ||
} | ||
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#endif |
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#ifndef DEBUG_H | ||
#define DEBUG_H | ||
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#define NDEBUG | ||
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#ifndef NDEBUG | ||
void dbgmsg_uart1(char *c); | ||
#else | ||
#define dbgmsg_uart1(x) /* Define empty macro */ | ||
#endif | ||
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#ifndef NDEBUG | ||
void dbgmsg_uart2(char *c); | ||
#else | ||
#define dbgmsg_uart2(x) /* Define empty macro */ | ||
#endif | ||
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#endif |
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#ifndef DELAY_H | ||
#define DELAY_H | ||
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#include "../clock.h" | ||
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void delay_us(unsigned int duration) | ||
{ | ||
#define NINST 2 // Number of instructions | ||
unsigned long count, limit = duration / (NINST * FCY); | ||
for (count = 0; count < limit; ++count); | ||
} | ||
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void delay_ms(unsigned int duration) | ||
{ | ||
delay_us(duration * 1000); | ||
} | ||
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void delay_s(unsigned int duration) | ||
{ | ||
delay_us(duration * 1000000); | ||
} | ||
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#endif |
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