Add some support for MSR_PEBS_FRONTEND.

Begins addressing issue #17.
obilaniu · Mar 12, 2018 · 516ad67 · 516ad67
1 parent 65db606
commit 516ad67
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Showing 2 changed files with 27 additions and 0 deletions.
diff --git a/kmod/libpfcmsr.h b/kmod/libpfcmsr.h
@@ -62,6 +62,9 @@
 #ifndef MSR_IA32_PERF_GLOBAL_OVF_CTRL
 #define MSR_IA32_PERF_GLOBAL_OVF_CTRL      0x390
 #endif
+#ifndef MSR_PEBS_FRONTEND
+#define MSR_PEBS_FRONTEND                  0x3F7
+#endif
 #ifndef MSR_IA32_A_PMC0
 #define MSR_IA32_A_PMC0                    0x4C1
 #endif
@@ -178,6 +181,16 @@
  *     IA32_PMC1       ClrOverflow --------------------------------------------------^|
  *     IA32_PMC0       ClrOverflow ---------------------------------------------------^
  */
+/** 3F7   MSR_PEBS_FRONTEND          -  Front-End Precise Event Condition Select,    ArchPerfMon v4
+ * 
+ *                     /63/60 /56     /48     /40     /32     /24     /16     /08     /00
+ *                    {.........................................###############...#.###}
+ *                                                              | ||          |   | | |
+ *     IDQ Bubble Width  Specifier -----------------------------^^^|          |   | | |
+ *     IDQ Bubble Length Specifier --------------------------------^^^^^^^^^^^^   | | |
+ *     Event Code Select High      -----------------------------------------------^ | |
+ *     Event Code Select           -------------------------------------------------^^^
+ */
 /** 4C1+x IA32_A_PMCx                -  General-Purpose Counter,     ArchPerfMon v3
  * 
  *                     /63/60 /56     /48     /40     /32     /24     /16     /08     /00

diff --git a/kmod/pfckmod.c b/kmod/pfckmod.c
@@ -335,6 +335,8 @@ static void pfcWRMSR(uint64_t addr, uint64_t newVal){
 		mask =                                0xFFFFFFFFFFFFFFF0;
 	}else if(addr == MSR_IA32_PERF_CTL){
 		mask =                                0xFFFFFFFFFFFF0000;
+	}else if(addr == MSR_PEBS_FRONTEND){
+		mask =                                0xFFFFFFFFFFC000E8;
 	}else{
 		return;/* Unknown MSR! Taking no chances! */
 	}
@@ -781,6 +783,18 @@ static ssize_t pfcMsrRd (struct file*          f,
 				return -1;
 			}
 		return len;
+		case MSR_PEBS_FRONTEND:
+			/**
+			 * It's technically only available on some Skylake+ processors, but
+			 * it's almost impossible to keep a pretty, up-to-date list of
+			 * CPUID families that are compatible.
+			 * 
+			 * Trust that the user knows what he's doing. The Doxygen for this
+			 * function does warn about the extreme lack of safety.
+			 */
+
+			*(uint64_t*)buf = pfcRDMSR(off);
+		return len;
 		default:
 			*(uint64_t*)buf = 0;
 		return -1;