Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

[RV64_DYNAREC] Fixed CVTSS2SD and CVTSD2SS opcodes #1913

Merged
merged 1 commit into from
Oct 8, 2024
Merged

[RV64_DYNAREC] Fixed CVTSS2SD and CVTSD2SS opcodes #1913

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 9 additions & 3 deletions src/dynarec/rv64/dynarec_rv64_f20f.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -238,9 +238,15 @@ uintptr_t dynarec64_F20F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
case 0x5A:
INST_NAME("CVTSD2SS Gx, Ex");
nextop = F8;
GETEXSD(v1, 0);
GETGXSS_empty(v0);
FCVTSD(v0, v1);
gd = ((nextop & 0x38) >> 3) + (rex.r << 3);
if (MODREG && gd == (nextop & 7) + (rex.b << 3)) {
v0 = sse_get_reg_size_changed(dyn, ninst, x2, gd, 1);
FCVTSD(v0, v0);
} else {
GETEXSD(v1, 0);
GETGXSS_empty(v0);
FCVTSD(v0, v1);
}
break;
case 0x5C:
INST_NAME("SUBSD Gx, Ex");
Expand Down
10 changes: 8 additions & 2 deletions src/dynarec/rv64/dynarec_rv64_f30f.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -221,9 +221,15 @@ uintptr_t dynarec64_F30F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
case 0x5A:
INST_NAME("CVTSS2SD Gx, Ex");
nextop = F8;
gd = ((nextop & 0x38) >> 3) + (rex.r << 3);
GETEXSS(v1, 0);
GETGXSD_empty(v0);
FCVTDS(v0, v1);
if (MODREG && gd == (nextop & 7) + (rex.b << 3)) {
v0 = sse_get_reg_size_changed(dyn, ninst, x2, gd, 0);
FCVTDS(v0, v0);
} else {
GETGXSD_empty(v0);
FCVTDS(v0, v1);
}
break;
case 0x5C:
INST_NAME("SUBSS Gx, Ex");
Expand Down
37 changes: 37 additions & 0 deletions src/dynarec/rv64/dynarec_rv64_helper.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1701,6 +1701,43 @@ int sse_get_reg_empty(dynarec_rv64_t* dyn, int ninst, int s1, int a, int single)
return dyn->e.ssecache[a].reg;
}

// get an ext register for an SSE reg which changes size, with single or not AFTER the change
int sse_get_reg_size_changed(dynarec_rv64_t* dyn, int ninst, int s1, int a, int single)
{
if (dyn->e.ssecache[a].v != -1) {
if (dyn->e.ssecache[a].vector == 1) {
// it's in the fpu, forget it first...
sse_forget_reg_vector(dyn, ninst, s1, a);
// update olds after the forget...
dyn->e.olds[a].changed = 1;
dyn->e.olds[a].purged = 0;
return sse_get_reg_size_changed(dyn, ninst, s1, a, single);
}

// forget / reload if change of size
if (dyn->e.ssecache[a].single == single) {
sse_forget_reg(dyn, ninst, s1, a);
return sse_get_reg_size_changed(dyn, ninst, s1, a, single);
}
dyn->e.olds[a].changed = 1;
dyn->e.olds[a].purged = 0;
dyn->e.olds[a].type = !single;
dyn->e.ssecache[a].single = single;
dyn->e.ssecache[a].vector = 0;
dyn->e.extcache[EXTIDX(dyn->e.ssecache[a].reg)].t = single ? EXT_CACHE_SS : EXT_CACHE_SD;
return dyn->e.ssecache[a].reg;
}
dyn->e.ssecache[a].reg = fpu_get_reg_xmm(dyn, single ? EXT_CACHE_SS : EXT_CACHE_SD, a);
int ret = dyn->e.ssecache[a].reg;
dyn->e.ssecache[a].single = single;
dyn->e.ssecache[a].vector = 0;
if (!single) // load happens before size changed
FLW(dyn->e.ssecache[a].reg, xEmu, offsetof(x64emu_t, xmm[a]));
else
FLD(dyn->e.ssecache[a].reg, xEmu, offsetof(x64emu_t, xmm[a]));
return ret;
}

// forget ext register for a SSE reg, does nothing if the regs is not loaded
void sse_forget_reg(dynarec_rv64_t* dyn, int ninst, int s1, int a)
{
Expand Down
55 changes: 29 additions & 26 deletions src/dynarec/rv64/dynarec_rv64_helper.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -1246,32 +1246,33 @@ void* rv64_next(x64emu_t* emu, uintptr_t addr);

#define emit_pf STEPNAME(emit_pf)

#define x87_do_push STEPNAME(x87_do_push)
#define x87_do_push_empty STEPNAME(x87_do_push_empty)
#define x87_do_pop STEPNAME(x87_do_pop)
#define x87_get_current_cache STEPNAME(x87_get_current_cache)
#define x87_get_cache STEPNAME(x87_get_cache)
#define x87_get_extcache STEPNAME(x87_get_extcache)
#define x87_get_st STEPNAME(x87_get_st)
#define x87_get_st_empty STEPNAME(x87_get_st)
#define x87_free STEPNAME(x87_free)
#define x87_refresh STEPNAME(x87_refresh)
#define x87_forget STEPNAME(x87_forget)
#define x87_reget_st STEPNAME(x87_reget_st)
#define x87_stackcount STEPNAME(x87_stackcount)
#define x87_unstackcount STEPNAME(x87_unstackcount)
#define x87_swapreg STEPNAME(x87_swapreg)
#define x87_setround STEPNAME(x87_setround)
#define x87_restoreround STEPNAME(x87_restoreround)
#define sse_setround STEPNAME(sse_setround)
#define mmx_get_reg STEPNAME(mmx_get_reg)
#define mmx_get_reg_empty STEPNAME(mmx_get_reg_empty)
#define mmx_forget_reg STEPNAME(mmx_forget_reg)
#define sse_get_reg STEPNAME(sse_get_reg)
#define sse_get_reg_empty STEPNAME(sse_get_reg_empty)
#define sse_forget_reg STEPNAME(sse_forget_reg)
#define sse_purge07cache STEPNAME(sse_purge07cache)
#define sse_reflect_reg STEPNAME(sse_reflect_reg)
#define x87_do_push STEPNAME(x87_do_push)
#define x87_do_push_empty STEPNAME(x87_do_push_empty)
#define x87_do_pop STEPNAME(x87_do_pop)
#define x87_get_current_cache STEPNAME(x87_get_current_cache)
#define x87_get_cache STEPNAME(x87_get_cache)
#define x87_get_extcache STEPNAME(x87_get_extcache)
#define x87_get_st STEPNAME(x87_get_st)
#define x87_get_st_empty STEPNAME(x87_get_st)
#define x87_free STEPNAME(x87_free)
#define x87_refresh STEPNAME(x87_refresh)
#define x87_forget STEPNAME(x87_forget)
#define x87_reget_st STEPNAME(x87_reget_st)
#define x87_stackcount STEPNAME(x87_stackcount)
#define x87_unstackcount STEPNAME(x87_unstackcount)
#define x87_swapreg STEPNAME(x87_swapreg)
#define x87_setround STEPNAME(x87_setround)
#define x87_restoreround STEPNAME(x87_restoreround)
#define sse_setround STEPNAME(sse_setround)
#define mmx_get_reg STEPNAME(mmx_get_reg)
#define mmx_get_reg_empty STEPNAME(mmx_get_reg_empty)
#define mmx_forget_reg STEPNAME(mmx_forget_reg)
#define sse_get_reg STEPNAME(sse_get_reg)
#define sse_get_reg_empty STEPNAME(sse_get_reg_empty)
#define sse_get_reg_size_changed STEPNAME(sse_get_reg_size_changed)
#define sse_forget_reg STEPNAME(sse_forget_reg)
#define sse_purge07cache STEPNAME(sse_purge07cache)
#define sse_reflect_reg STEPNAME(sse_reflect_reg)

#define sse_get_reg_empty_vector STEPNAME(sse_get_reg_empty_vector)
#define sse_get_reg_vector STEPNAME(sse_get_reg_vector)
Expand Down Expand Up @@ -1499,6 +1500,8 @@ int sse_get_reg(dynarec_rv64_t* dyn, int ninst, int s1, int a, int single);
int sse_get_reg_vector(dynarec_rv64_t* dyn, int ninst, int s1, int a, int forwrite, int sew);
// get float register for a SSE reg, but don't try to synch it if it needed to be created
int sse_get_reg_empty(dynarec_rv64_t* dyn, int ninst, int s1, int a, int single);
// get an ext register for an SSE reg which changes size, with single or not AFTER the change
int sse_get_reg_size_changed(dynarec_rv64_t* dyn, int ninst, int s1, int a, int single);
// get rvv register for an SSE reg, but don't try to synch it if it needed to be created
int sse_get_reg_empty_vector(dynarec_rv64_t* dyn, int ninst, int s1, int a);
// forget float register for a SSE reg, create the entry if needed
Expand Down
Loading