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Simple operating system in C++, written from scratch

C++ 1,678 182 Updated Nov 19, 2024

A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

VHDL 627 50 Updated Feb 25, 2025

Learn about the Neumorphic engineering process of creating large-scale integration (VLSI) systems containing electronic analog circuits to mimic neuro-biological architectures.

Python 415 59 Updated Jan 4, 2024

A new Hardware Design Language that keeps you in the driver's seat

Rust 75 5 Updated Feb 25, 2025

An open source high level synthesis (HLS) tool built on top of LLVM

C++ 119 19 Updated Jun 11, 2024

A Simple showcase for the Sea-of-Nodes compiler IR

Java 496 38 Updated Feb 26, 2025

An AXI4 crossbar implementation in SystemVerilog

SystemVerilog 133 26 Updated Feb 20, 2025

CM5 LoRaWAN carrier board in a compact, feature-filled footprint

37 4 Updated Jan 16, 2025

Projects for an undergraduate OS course

C 4,610 1,287 Updated Jul 19, 2024

Build your hardware, easily!

C 3,170 595 Updated Feb 20, 2025

A Real Time Operating System written in Zig

Zig 9 1 Updated Feb 2, 2025

The repo for HotOS paper "FIFO can be Better than LRU: the Power of Lazy Promotion and Quick Demotion"

C 32 3 Updated Jun 20, 2023

No RTOS need any more, you will see... Function pointers queues classes library for Arduino or any other platform. Use it anywhere. Manipulate your tasks in an easy and flexible way, keep your inte…

C++ 198 9 Updated Jan 28, 2025

Real-Time Interrupt-driven Concurrency (RTIC) framework for ARM Cortex-M microcontrollers

Rust 1,912 220 Updated Feb 19, 2025

Rust crate for FreeRTOS

Rust 402 63 Updated Jan 6, 2025

Полезные ресурсы по тематике FPGA / ПЛИС

159 23 Updated Nov 11, 2024

An elementary-level smartnic example, with fpga-based integrated structure

C 8 2 Updated May 27, 2023

A FPGA friendly 32 bit RISC-V CPU implementation

Assembly 2,673 431 Updated Feb 14, 2025

Light Utilization with Multicycle Operational Stages (LUMOS) RISC-V Processor

SystemVerilog 48 40 Updated Jan 4, 2025

A secure embedded operating system for microcontrollers

Rust 5,659 721 Updated Feb 25, 2025

A curated list of awesome smartnic tutorials, papers and projects.

250 34 Updated Dec 26, 2024

How to survive CMU as an ECE/CS major

537 131 Updated Jul 1, 2024

⚡A CLI tool for code structural search, lint and rewriting. Written in Rust

Rust 8,087 203 Updated Feb 25, 2025

Project F brings FPGAs to life with exciting open-source designs you can build on.

SystemVerilog 625 54 Updated Jan 22, 2025

32-bit Superscalar RISC-V CPU

Verilog 944 156 Updated Sep 18, 2021

This is a verilog implementation of 4x4 systolic array multiplier

Verilog 46 11 Updated Nov 2, 2020

A minimal Database Management System that prioritizes storage space usage and fast lookup/query times.

Rust 12 Updated Apr 15, 2024

Modular Multi-ported SRAM-based Memory

Verilog 29 11 Updated Nov 8, 2024

FPGA based transmitter

Verilog 92 14 Updated Apr 14, 2017

Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC

VHDL 91 13 Updated Oct 18, 2016
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